5 ms·
The microarchitectures that I saw and the ones that I hope to one day see [pdf]
- buildbot 3y agoJust starting to read this, but I already am on board based on the humor and extremely accurate re-writing of the famous do what you love and never work a day in your life quote. mid read edit - wow, this is a pretty huge indictment that literal cross company gang conspired to suppress security issues in modern processors? Unless I drastically misread? And that google / others failed to bother to apply some of these mitigations well or at all?
- Scarblac 3y ago"We do this not because it's easy, but because we thought it'd be easy" is gold. Perhaps not his, but I will steal it for my next presentation :)
- buildbot 3y agoAlso very true in my experience Me: "this should be easy" Narrator: It was extremely not easy
- pyrolistical 3y agoProduct vision: this ought to be easy
- pjc50 3y ago> that literal cross company gang conspired to suppress security issues in modern processors Alarming, but sadly not uncommon in software either; vendor internal politics means that a lot of people really do not like "disclosure" and push for everything to be behind closed doors. Not to make things insecure (although it may have that effect), but to avoid the perception of insecurity.
- cnagesh 3y agoCan someone post the link to the talk ?
- sweetjuly 3y agoThe conference just happened a week ago and I believe this is an original talk. It might be a while until a recording is published.
- deleted 3y ago[deleted]
- cvccvroomvroom 3y agoPerhaps looking towards the promised land of a practical macro and micro arch defensible in the real world, then start with a minimal ISA that can most readily implement a capabilities secure kernel like seL4. Too many features are a problem.
- sufiyan 3y agoI don’t get it. If security is so important, then it should be okay to sacrifice performance. Why is there such inertia in accepting this? If security is all that is needed, get an in order completely non speculative core with no branch prediction (you can’t even run your side channels in this case efficiently)
- WJW 3y agoAre these even sold today? Outside of embedded systems I mean.
- pjc50 3y agoNot for desktop use, no. Probably the most powerful example remaining will be some sort of DSP designed for predictable cycle-accurate timing.
- zokier 3y agoArm Cortex-R series is intended to very hard real-time, and do branch prediction only if explicitly enabled > However, the Cortex-R7 and Cortex-R8 do not enable branch prediction automatically at reset. This means software must enable branch prediction to get the maximum hardware performance. https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/measuring-the-impact-of-branch-prediction-for-cortex-r7-and-cortex-r8 https://community.arm.com/arm-community-blogs/b/architecture... Its still OoO but idk how much that impacts anything Edit: apparently only r7/8 were ooo, r52/82 are in-order again
- gpderetta 3y agoThe problem is that nobody is willing to pay a x100 penalty for security for general purpose computing.
- renox 3y agoEven a very low penalty isn't something that the industry is willing to produce.. For example, the RISC-V is derived from the MIPS, the MIPS had some instruction to trap on integer overflow, it's a very minor penalty to have these instructions, and guess what? They haven't been included in RISC-V..
- ed_blackburn 3y agoCompared to the simplicity of the decorator design pattern, I always found AOP libraries unnecessarily complicated and too implicit (magic.)