10 ms·
In 1981, Intel released the iAPX 432
- userbinator 4y agoDespite the complexity, it's worth noting the total transistor count of the 432 (97k) is still less than that of the 286 (134k) and the 386 (275k).
- rep_lodsb 4y agoWhere do these numbers come from? The linked thread says that the instruction decoder chip alone has 110k transistors.
- kens 4y agoThe 97,000 transistor count number is from Wikipedia. The number appears to be fictional and doesn't match other sources so I marked it as [citation needed].
- forgotmypw17 4y agohttps://archive.is/imnEY https://archive.is/imnEY
- rektide 4y agoIntel's first attempt at a 32-bit (thanks for the save chris_st) CPU, a huge massive two-chip CISC beast. Read in, well worth it.
- chris_st 4y agoDo you mean their first 32-bit CPU? The 4004/8008/8080 all precede it (edited, thanks chihuahua).
- deleted 4y ago[deleted]
- monocasa 4y agoAwesome, I was really hoping that kens would take a look at the 432 chipset given his experience reversing the 8086 and the fact that the 432 is on a similar Intel HMOS process. Particularly because the 432 has a lot of commentary on why it failed, but unfortunately lacks a lot of hard details on what all it actually was. If people want to read more, some of the best docs I've found are the academic literature on the chips. Instruction Decoder: https://doi.org/10.1109/JSSC.1981.1051633 https://doi.org/10.1109/JSSC.1981.1051633 Execution Unit: https://doi.org/10.1109/JSSC.1981.1051631 https://doi.org/10.1109/JSSC.1981.1051631 Interface Processor: https://doi.org/10.1109/JSSC.1981.1051632 https://doi.org/10.1109/JSSC.1981.1051632
- kens 4y agoYes, those papers were very informative. Also the iAPX 432 patents have a lot of detail: https://patents.google.com/patent/US4325120A https://patents.google.com/patent/US4325120A https://patents.google.com/patent/US4367524 https://patents.google.com/patent/US4367524 https://patents.google.com/patent/US4415969 https://patents.google.com/patent/US4415969
- Findecanor 4y agoThe book "Capability-Based Computer Systems" by Henry M. Levy has 28 pages on how to program the iAPX432. Quite a lot to digest. <https://homes.cs.washington.edu/~levy/capabook/Chapter9.pdf https://homes.cs.washington.edu/~levy/capabook/Chapter9.pdf>
- chris_st 4y agoAnd, then in 1989, they released the i860 [0] with similar promises to similar failure. 0: https://en.wikipedia.org/wiki/Intel_i860 https://en.wikipedia.org/wiki/Intel_i860
- kjs3 4y agoIntel and Microsoft thought so much of the i860's future, it was the architecture Microsoft started developing Windows NT on. Obviously...didn't work out.
- WorldMaker 4y agoSimilarly, NT allegedly invested a lot into supporting the even later (and more goofily named) Itanium [1] (IA-64) architecture. In general, Intel's history of failed architectures is almost more interesting than its history of winning architectures. [1] https://en.wikipedia.org/wiki/IA-64 https://en.wikipedia.org/wiki/IA-64
- kjs3 4y agoThe full Intel i960 implementation (i960MX & i960MC variants) was particularly interesting, supporting a capabilities based arch and a lot of built in fault tolerance features. Unfortunately, it got squeezed by the BiiN project going nowwhere in the end, and both the i386 & i860 competing for mindshare within Intel. In the end, they stripped out most/all of the nifty stuff and made a lot of money from i960 as a high-end but pedestrian embedded processor.
- jandrese 4y agoThe i860 failed for entirely different reasons though. It was really a vector engine that could manage some general compute with some grumbling whereas the 432 was built for general purpose applications written in Ada. But I guess they did both fail for the same reason: they were more expensive and slower than x86 when running regular applications. Itanium would follow this trend. Come to think of it i860 and Itanium are far more closely related, both suffering greatly from the Intel hardware engineers punting on the difficult instruction scheduling issues with the architecture and the compiler writers not being able to pull the rabbit out of the hat and magically fix those issues. So you have chips that only ever perform properly on trivially parallelizeable tasks and are slow on the vast majority of code.
- cpeterso 4y agoFor more of the story behind the development of the iAPX 432, check out "iAPX432 : Gordon Moore, Risk and Intel’s Super-CISC failure": https://thechipletter.substack.com/p/iapx432-gordon-moore-risk-and-intels https://thechipletter.substack.com/p/iapx432-gordon-moore-ri... https://news.ycombinator.com/item?id=35412342 https://news.ycombinator.com/item?id=35412342
- kabdib 4y agoI was taking a VLSI design course around that time; our instructor came into class with a fist-size block of plexiglass, with an iAPX 432 chipset embedded in it. A gift from Intel. The chips were HUGE. I have Elliot Organick's book on the 432. It is not fun reading.
- jandrese 4y agoOnly one chip wasn't even enough, the amount of die needed and the limited lithography at the time meant Intel had to split it into three huge and expensive chips. One of the crazier aspects of the design was that the chip design basically required the Ada computer language to take over the world. As far as predictions of the future go that has to be one of the most expensive misses of all time.
- Taniwha 4y agoRemember that at the time no one put a main-frame class chip on a single die - the 68ks/32ks, and much later 386s were the first generation who managed to pull off putting a large architecture on a chip (I'm trying to make a distinction here between architecture and what particular implementations could do) - in the early 70s mainframes were the size of basketball courts, in the late 70s/early 80s they were the size of a large fridge (and disk drives the size of a washing machine). So splitting it all in 3 wasn't necessarily the crazy idea we might think it is today - it still all fitted on one circuit board!
- jandrese 4y agoIt depends on your perspective. From a mainframe/minicomputer standpoint it was pretty good. From the microcomputer perspective it was nuts. Unfortunately for Intel they've always been closely associated with microcomputers so that is the standard by which they were judged.
- twoodfin 4y agoAt the time it wasn’t at all clear that microcomputers and their architecture would graduate from being toys for hobbyists to ruling the computing world. It was assumed in many circles (including Intel, apparently) that minis and mainframes—really, more “modular” less “integrated” architectures—would own the enterprise. (The dependence on Ada makes a lot more sense in this context: Your mainframe vendor telling you what language you could use wasn’t odd at all in that space.) DEC also essentially fell victim to this misapprehension, and unlike Intel didn’t have a Plan B.
- pjdesno 4y agoI remember reading all about it in my dad's issues of Spectrum.
- suid 4y agoThat was the starting point of my undergraduate independent seminar topic. Back then the complexity was even more mind-boggling, as I had barely any appreciation of the object-oriented world, and the idea of pushing all that into the micro-architecture was really hard to get my mind around, let alone talking about it to a class full of fellow students.
- zymhan 4y agoRecent related post: https://news.ycombinator.com/item?id=35412342 https://news.ycombinator.com/item?id=35412342 "iAPX432: Gordon Moore, Risk and Intel’s Super-CISC Failure"
- kens 4y agoAuthor here if there are any questions. Also, if anyone happens to have other iAPX 432 chips sitting around, I'd be happy to take high-resolution die photos. There aren't good 432 die photos around, so I was happy to get access to the 43201 chip. The thread is also on Twitter: https://twitter.com/kenshirriff/status/1649075486008524801 https://twitter.com/kenshirriff/status/1649075486008524801
- panick21_ 4y agoTom Lyon said in a podcast he has some, he said his wife was in Intel Marketing and they were giving them away. You should be able to find him.
- helf 4y agoJust wanted to say that I love your content and look forward to new stuff. Thanks so much for putting the effort forward that you do! I’ve learned tons of the years following you :) greatly appreciate it.
- pantulis 4y agoThe DX7 reverse engineering was epic!
- Zanni 4y agoFavorite bit: "What if the 432 had won? Computing would be very different. Many security problems wouldn't exist. You can't have a buffer overflow because every data structure is a separate object with memory segment size enforced in hardware. You can't smash the stack or make bad pointers." In the early 80s, speed was everything and security a non-issue. LANs hadn't even taken off yet, let alone the internet. But that's almost flip-flopped today.
- WorldMaker 4y agoI'm really curious at this point what would happen if someone tried to resurrect a design like the 432. Maybe not the 432 exactly because things like bit-aligned instructions are still awkward/weird and didn't turn out to be as useful as the designers hoped. (It seems like an obvious compromise because object-tagging taking so much RAM in an era where RAM was so expensive it is an easy bet that they felt a need to nickel and dime/golf program code size, if they could.) But even just reusing the architecture as-was, it would certainly be cheaper and need fewer chips today. It might be fun to have a cheap Raspberry Pi-like board with a 432 to experiment coding against.
- kens 4y agoThe ironic thing is that the performance analysis paper [*] found that the weird bit-aligned instructions iAPX 432 didn't actually help code size. "Although the 432 has bit-variable length instructions, it requires more space than either the 68000 in Pascal or the VAX in C. Reasons include the lack of immediates and the inability to refer to a local variable or constant using fewer than 16 bits of address." (From a modern perspective, the test programs are absurdly small: 120-2900 bytes. Nowadays, you probably couldn't even create a program that small.) [*] https://archive.org/details/PerformanceEvaluationOfTheIntelAPX432/page/n3/mode/2up https://archive.org/details/PerformanceEvaluationOfTheIntelA...
- bbatha 4y agoThe CHERI extension for ARM does this: https://www.cl.cam.ac.uk/research/security/ctsrd/cheri/ https://www.cl.cam.ac.uk/research/security/ctsrd/cheri/. The Rust language is experimenting with adding language level pointer provenance apis that provide the same info to the compiler, and would presumably compile to the instructions if available, https://doc.rust-lang.org/nightly/std/ptr/index.html#strict-provenance https://doc.rust-lang.org/nightly/std/ptr/index.html#strict-...
- JoeAltmaier 4y agoMy brother worked there at the time. He wanted in on the project, but Intel mgmt had already begun to pull back from it, controlling costs. I recall him saying at the time, "A JMP . instruction takes 500 machine cycles". This was apparently because it was largely an interpreter - the 'assembly' wasn't run in hardware but some kind of firmware. I suppose the OP covered all that.
- sedatk 4y agoTo be fair, all modern CISC CPUs are microcode interpreters too.
- dfox 4y agoImplementing a CPU by writing an interpreter in lower level microcode is a obvious implementation strategy for CISC ISAs. But the mechanism how modern OoO x86 CPUs (and even many notionally RISC CPUs) works is different: The incoming instruction stream is converted into internal “more RISC” uOps and these are then executed by the OoO pipeline, this happens almost entirely in hardware (and on current x86 implementations with somewhat incredible amount of parallelism) and can in fact even combine multiple instructions into one uOp (or even completely discard an instruction). There is usually some microcode, but this is there to handle instructions that cannot be efficiently mapped to block of the uOps (too much work done in one instruction, interestingly ARM has bunch of such cases) and to handle interrupt and exception handling.
- aidenn0 4y agoSomeone observed to me once that the dominance of ARM has proven both the CISC and RISC sides wrong as ARM has fairly intermediate complexity instructions.
- kimixa 4y agoI've generally heard that the two major successful architectures today are the most complex RISC in ARM, and the most simple CISC in x86.
- e40 4y agoWhen I was at UCB I was roommates with a grad student working on/with (not sure which) the 432. I was learning CS at the time and what he described did seem like a wild alternate universe of computing.
- kens 4y agoWas your roommate working on the 432 performance paper? (Paul M. Hansen, Mark A Lirdon, Robert N. Mayo, Marguerite Murphy, and David A Patterson)
- e40 4y agoNot one of those people... honestly, having trouble remembering his name now, but I would recognize it if I saw it. And, I know Dave Patterson wasn't my roommate. :) His office was just down the hall, though, when I was at UCB. EDIT: I think it was Karl (Carl?) something.
- bitwize 4y agoWow, it's a Burroughs machine on a chip! Well, two chips actually, but the idea is the important thing.
- somat 4y agoI have a strange fascination with the Burroughs large system perhaps because I like stack machines. But yeah I can see the resemblance, what Algol was to the Burroughs Ada was to the Intel 432 There is a fun web based Burroughs B5500 emulator. Totally worth it to spend an evening running through the boot procedure. http://phkimpel.us/B5500/webUI/B5500Console.html http://phkimpel.us/B5500/webUI/B5500Console.html
- Taniwha 4y agowell sort of, similar stuff ... though it's worth remembering that Burroughs security depends on only specially blessed programs called 'compilers' being able to make code - because the underlying architecture has no real protection, it depends on compiled code playing well with the hardware. There are all these special hardware descriptors and stuff so that you can't step out of arrays, but there's also an instruction you can execute that will blindly make one (and there's one available to every process that describes all of memory ....). As I said system integrity and system security depends on people not being able to make arbitrary code, only a privileged user can make code a compiler, and only a compiler can make a code file .... The 432 had a lot of similar data structures but genuinely did have the security and integrity one would expect from a capability system
- Joker_vD 4y agoSounds like Midori/Singularity. Or like any of Per Brinch Hansen's OSes, written in concurrent dialects of Pascal and depending on the language-level constructs for memory protection and process separation (they could and did run on machines without MMUs).
- Taniwha 4y agoThe old Burroughs systems (up to at least the B7700) didn't really have MMUs in the traditional sense - their descriptors only reserved 20 bits for (word addresses) so they were limited to ~6Mb of addressing - not a big deal when we had paid over a US$ million for 1.5Mb of B6700 core, no one could have afforded more - they paged segments (much as a 432 would have) and also supported segments chunked into 256 word chunks for large arrays (at the cost of an extra memory access per lookup).
- tibbydudeza 4y agoThe days of Byte Magazine where people and esp venture capitalists funded and the market had space for all sorts of new ideas like the Amiga. My favourite one was a 3 chip Object Oriented system called Objekt,Numerik and something else by Hifi manufacturer Linn - the owner at the time loved the Vaxen running his factory and funded a new architecture. The fixation with the letter "k" I found rather intriguing.
- EdwardCoffin 4y agoThe four chip system you are thinking of was the Logik, Objekt, Numerik, and Klock chips that made up Rekursiv [1]. There was some crazy backstory to it that I read up on a few years ago, which I no longer remember, but I do remember it was outlandish. [1] https://en.wikipedia.org/wiki/Rekursiv https://en.wikipedia.org/wiki/Rekursiv
- tibbydudeza 4y agoYeah the owner of Linn at the time wanted something to replace the Vaxen in his factories and he did not like the direction DEC was going (Alpha) and funded two Comp Sci professors to do a new bespoke full OO design. From reading it only reached a prototype state in software on a Sun 3 Workstation and some logic boards but then Linn ran into some financial difficulties and it was cancelled.
- scroot 4y agoIf you can get your hands on the book they published about it (titled "Rekursiv") you should give it a read. It's written in a fun style and is actually quite interesting
- EdwardCoffin 4y agoYeah, that's where I got this stuff from. I'm debating re-reading it now that I know something about this stuff: I originally looked at it as a clueless undergrad.
- walnutclosefarm 4y agoAny discussion of the iAPX 432 should mention IBM's earlier stab at building a minicomputer around a single-level object store hardware architecture - the System 38. It too struggled in the market, although being a sibling of the system 3X -> AS/400 line, didn't die quite as ignominiously as the iAPX 432.