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Verilog Ethernet: Work-in-Progress 100BASE-TX PHY
- aix1 4y agoI'm trying to understand the relevance of Fast Ethernet in the modern world. What are some current use cases? Or is this project primarily of educational value? (I couldn't find anything in the docs.)
- _moof 4y agoA number of FPGAs come with hardware Ethernet peripherals built-in so I'm guessing this is for fun.
- _moof 4y agoBrain fart - didn't register that this is a PHY, not a peripheral core. Different parts.
- joosters 4y agoSmaller devices that don't need to send or receive more than 100mbits? Devices that don't want to consume more energy than necessary? (I think gigabit is more power-hungry). Wifi isn't practical for all use cases either.
- amrb 4y agoIndustrial systems for one
- proto_lambda 4y agoFast Ethernet is better than no Ethernet, and gigabit is unachievable in low-end FPGAs.
- aix1 4y agoGigE not being achievable on low-end FPGAs explains it really well, thank you.
- lnsru 4y agoAt the moment I have Artix 7 with ancient gigabit PHY running GigE. In Xilinx eco-system it is pretty low-end device.
- stas2k 4y ago20 Euro Colorlight 5A FPGA boards from Aliexpress come with dual Gigabit Ethernet ports, open toolchain to build a SoC that can access them as well. LiteX allows me to use it as a Gigabit Ethernet powered logic analyzer with a lot of inputs.
- stephen_g 4y agoNo, if the FPGA can do this, then it would be perfectly capable of interfacing to a gigabit PHY or a parallel/serial converter for a Gigabit SFP.
- NovemberWhiskey 4y agoRGMII only requires a 125MHz clock; which is not particularly fast. It depends what you mean by "low-end", but you can certainly implement gigabit Ethernet on something like an Intel/Altera MAX 10 for example. It does rather depend on what you want to do with it though.
- stephen_g 4y agoBut if you have IO fast enough to do direct 100Mbps Ethernet, you can do GMII or RGMII to a gigabit PHY (or a parallel to serial converter to talk to an SFP). I think the project here goes through MII internally anyway (I only skimmed it) so it would actually take more space on the FPGA fabric than using a PHY… So apart from being fun, maybe the main benefit would be less board space because it doesn’t need the PHY chip? (But also potentially lots of disadvantages practically).
- NovemberWhiskey 4y agoYeah. A Fast Ethernet PHY that does 10/100 Ethernet with auto-negotiation, auto-MDI/MDIX etc. is less than $1 in quantity and fits in a footprint a couple of mm on each side. I think this is a "because I can" sort of thing.
- bartlettD 4y agoAnother good exampe is the industrial space. Factory machinery used to communicate over serial type interfaces, but now theres a push to move to EtherCAT which is a determistic protocol built on top of Fast Ethernet. There is a GigE specification now too, but if all you're doing is controlling some motors you don't need that much throughput.
- PinguTS 4y agoEtherCAT is not build on top. EtherCAT is just a bit-chain who looks like valid Ethernet frames so that the controller side, and the switch side can handle them like any other regular Ethernet frame. The device aka slaves need a special implementation that just goes through the frame in real-time and changes the bits in real-time and at the end modifies the CRC accordingly in real-time. So, it is not built on top. On top there are other things like ProfinetIO.
- bartlettD 4y agoEtherCAT is built on top of IEEE 802.3 Frames, you're right that there is a special controller but those interface over MII to a standard Ethernet PHY. They don't look like valid Ethernet Frames, they are valid Ethernet Frames. Ethercat embeds its Ethertype within the frame the same way that other protocols do. As you say, EtherCAT does its own thing with the frames, to get the real-time determistic performance it needs, but EtherCAT and other 802.3 Frames can co-exist. https://www.ethercat.org/pdf/english/EtherCAT_Introduction_0905.pdf https://www.ethercat.org/pdf/english/EtherCAT_Introduction_0... Slide 25-32 are a good high level overview of possibilities. Slide 32 shows a setup with Co-Existance.
- PinguTS 4y agoThanks for referencing. I still have one of the original specification somewhere in my closet, when I was asked to review it. They are made to look alike valid Ethernet frames. The idea was: how to make Interbus look alike Ethernet and how to make some patents to make money out of it. Originally you had to buy the controllers from Beckhoff. Now they are integrated by many µC, but still they have to pay licensing fees to Beckhoff.
- terom 4y agoThe ESP-32 is a $2 microcontroller that has a Fast Ethernet MAC. It won't handle gigabit, but it can do plenty. Having support for 100BASE-TX solves a lot of problems with Wi-Fi.
- nrclark 4y agoThere are tons and tons of industrial products that use Ethernet for communication, but don't necessarily need a ton of data. Maybe a C&C machine, or a 3D printer, or an oscilloscope, or an automotive network. For any kind of command-and-control applications, 100 Mbit is more than fast enough. Even 10 Mbit would be plenty for lots of systems. Around the house, you'll find 100BASE-T Ethernet on wired security cameras, televisions, printers, home-automation, and lots of other stuff too. As a product designer, there are lots of reasons why I might want to put Ethernet on my widget. It's more robust than wifi, it's lower-power, and it's cheaper. It also has much longer range. I might also like to use Power-over-Ethernet to avoid the need for batteries or an electrical outlet. Ethernet is also much easier to handle than wifi, from a software perspective. And there are lots of products don't really need more than 10-20 KB/sec of data throughput. I worked on a product in 2022 that settled on 100BASE-T Ethernet as the right design fit (as a backup to wifi), and it was a great choice for the project. I'd make the same choice again today, for a similar system. 10BASE-T is pretty much gone at this point, but 100BASE-T is alive and well as the lowest common-denominator. Pretty much all networking gear on the market supports 100BASE-T flawlessly, even if the rest of the devices on the network are 1000BASE-T or 2.5GBASE-T. Almost every laptop (or USB) Ethernet adapter also supports auto-negotiate and auto-crossover, meaning that you could plug your laptop right into some device's 100BASE-T port and start talking to it. FPGAs are typically a little too pricy for consumer gear, but they're incredibly common in higher-margin commercial, industrial, and military equipment. And if your design already has an FPGA for some reason or another, why not use it to provide Ethernet as well? Cuts down on the number of chips you need to use in your design.
- preisschild 4y agoEven most Smart-TVs still have only 100BASE-T ethernet connections, but this is still enough to stream a high-bitrate 4K DoVi/HDR10+ movie.
- toast0 4y agoSome 4k blu-rays will peak at greater than 100Mbps, so if you want to stream those without recompressing, you may need a big buffer or gigE.
- RF_Savage 4y ago100mbit ethernet is very common in industrial use. It is also more robust EMI/RFI and easier to get past EMC certifications. And 10Base is evolving, not going a way. Base-T1L spec got recently released. It does full-duplex 10mbit over a single twisted pair. It is rated for +1000meter cables. 1/10 of the speed of 100BaseTX, but 10x the range.
- sgtnoodle 4y ago1Gbps may actually be easier than 100mbps from an EMC perspective. 100mbps links are infamous for trashing HAM frequencies. Indeed, when I played around with my RTL-SDR at home, the FM spectrum was littered with harmonic spikes originating from the one and only 100mbps link I had at the time.
- crote 4y agoSame reason virtually all keyboards and mice still use USB 1.2: if you don't need the speed, why go through all the trouble trying to design for a way more complicated standard? You can bitbang USB over a wet string with an ATtiny. If you want USB 2.0 you need dedicated hardware for it in your MCU, and you need to pay some attention to your PCB design. With USB 3.0 you need an expensive MCU, and you need to actually pay close attention to PCB design to ensure the signal remains intact. USB 3.1 and above is basically magic. The same will apply to Ethernet: stick to the slowest standard which is sufficient for your application to save yourself a lot of headache.
- ultrarunner 4y agoThere are several long-range wireless gateways that use Fast Ethernet just because the RF link is the bottleneck. When you run up against physics, there's just no point in supporting a gigabit path in/out.
- skanderberg 4y agoDoes anyone have experience with the AGPL in hardware, where it is much harder to figure out if a given core is used in the system?
- RobotToaster 4y agoI doubt it. CERN-OHL-S seems more common in open hardware. In general FOSH licenses aren't as developed or tested as FOSS ones.
- JoachimS 4y agoYes I have. Any company I've been involved with, met that look at and use, contribute to open source at all (SW as well as HW) avoid AGPL. Many ban employees from downloading, clone something known to be AGPL licensed. Releasing under AGPL is a great way to not see your design being used and contributed to. At least by entities that wants to abide by the license and do the right thing. Entities that steal work done by others, have no intention to contribute back may do differently.
- RobotToaster 4y agoYou mean it's a great way to stop corporations abusing your work to make a proprietary SaaS?
- knorker 4y agoYes, but also stop them contributing in any way what so ever, including diligently upstreaming. AGPL throws the community baby out with the bathwater.
- doublepg23 4y agoSeems to be working okay for Mastodon.
- knorker 4y ago
- unixhero 4y agoI don't understand the significance of this. Tried to read up on what PHY refers to, but didn't connect the dots. How will this make progress?
- matthews2 4y agoThe PHY (physical layer) turns the boring digital signals from our microcontroller into exciting analogue/RF signals.
- mschuster91 4y agoan Ethernet PHY layer usually refers to the layer that makes digital signals suitable for transmission on the medium (and the inverse for receiving). Think for example a standard SoC chip for an embedded device scenario - it will have one or more MII ports [1]. Onto these MII ports, you can then attach a PHY chip for your needs... Ethernet, coax, fiber optics, direct connection, whatever, so you don't need to change your SoC chip or even your operating system just if you want to offer a product with Ethernet and fiber networking. Usually, these chips are proprietary... but this project provides an open source implementation, so that in the worst case of no one producing Ethernet PHYs any more, you can take an FPGA instead. [1] https://en.wikipedia.org/wiki/Media-independent_interface https://en.wikipedia.org/wiki/Media-independent_interface
- chrisMyzel 4y agocould someone please break this down even more :) I can make a 100 Gbit repeater using an FPGA with this?
- mschuster91 4y agoNo. 100BASE is 100 mbit/s.
- stephen_g 4y ago100Gbps requires expensive FPGAs because you need very fast SERDES peripherals on-die to transmit/receive the four lanes of 25Gbps to the other device (usually a QSFP28 module but you can communicate directly between two chips with just SERDES without converting to any kind of Ethernet). Normal logic pins on FPGAs generally can’t be used to transmit or receive fast enough (not to mention some of these standards are using multi-level signalling like PAM-4 which a normal logic pin just can’t do). 100Mbps on the other hand (like this project is doing) is possible to produce, but I do wonder how likely it would be to be able to practically receive with any meaningful cable length without an analogue front-end that you find in a PHY.
- bartlettD 4y agoThis is really neat! Lots of FPGAs have MAC peripherals or IP Cores but the PHY is usually an external component. There are some good reasons for that though, I'm not entirely sure that an FPGA can drive hard enough for a useful Ethernet PHY except for parhaps short range stuff, not sure what happens when the isolating magnetics are added. I wish there was a good IP Core for the IP Stack though, most implmentations of IP Ethernet on FPGAs use a softcore to run the networking stack which bumps up the utilization a lot. I'm absolutely certain a basic IP layer could be done purely in HDL which would go a long way in getting Ethernet going on lower spec FPGAs.
- gorkish 4y agoThe OpenHPSDR project implements a good chunk of basic networking without a soft core at 100mbps and 1gbps; ARP, DHCP, and UDP are in there. TCP is not implemented.
- Aromasin 4y agoIntel have Hard IP in their Stratix/Agilex parts. They've got integrated PCS and PMA in their dedicated transceiver tiles. Agilex supports 10G to 400G too.
- robomartin 4y agoWell, in most of the hardware designs I work on you would never want to run anything from the outside world directly into an FPGA. That's a sure way to destroy a very expensive chip. Using robust purpose-built devices with internal and external protection against such things as +/- 15 kV static discharge is important for reliability and more.
- walrus01 4y agoGreat fun, I can plug it into my Cisco 3548XL-EN
- DeathArrow 4y agoOpen source hardware is cool!
- deleted 4y ago[deleted]
- peter_d_sherman 4y agoLove it! More power to you and this open source/open hardware/transparent hardware, highly educational project! Upvoted and favorited!