3 ms·

How do they get the carbon nanotube in the correct position and orientation like that? I suspect it will be difficult to do it reliably and cheaply for billions

by wcoenen 15y ago

How do they get the carbon nanotube in the correct position and orientation like that? I suspect it will be difficult to do it reliably and cheaply for billions of transistors at a time.

yvdriess 15y ago
The mass production of transistors is completely thanks to its relatively etching process. I wonder if we will see a relatively similar process for alternative transistor technology.
foreverbanned 15y ago
They probably use an atomic force microscope (google "atomic force microscope nanomanipulation").
adestefan 15y ago
Pfft. That's an engineering problem, not a research problem. I kid a bit, but IBM does have the fabrication engineering talent to pull it off.
sliverstorm 15y ago
Probably. There's a reason we are still using 32nm silicon, even though we can experimentally fabricate graphene & gallium-arsenide transistors at sizes down to... 6nm? (That's the smallest I remember.)
johapers 15y ago
I apologize if this is a bit long: The answer can be found in the supplementary information to the article here: http://pubs.acs.org/doi/suppl/10.1021/nl203701g/suppl_file/nl203701g_si_001.pdf http://pubs.acs.org/doi/suppl/10.1021/nl203701g/suppl_file/n... In short, they grew the nanotubes on a quarts crystal, transferred them with tape quite randomly to gates already made on a Si-wafer and then etched and metalized around these gates. They then tested a large amount of devices to find ones where a nanotube of the right kind (semiconducting) had placed itself in a correct alignment with the gate and metalized contacts (source and drain). Once they knew what devices were working they imaged some of the working devices with an Atomic Force Microscope (AFM) and did a bunch of standard transistor measurements. As was commented earlier, the specific growth of nanotubes in a well defined position is not easily achieved. There is IMO a long time until anyone can do a full chip where nanotubes grow exactly where one wants the transistors. It might even be that graphene is a more convenient technology for just this reason (since graphene can be grown somewhat more conveniently by annealing SiC wafers). A side note I guess is that growing nanotubes and pillars vertically can be done in specific spots on a wafer, but that makes manufacturing of the gate a bit problematic. And I do not know wheter carbon nanotubes can be grown selectively this way.

by wcoenen 15y ago

How do they get the carbon nanotube in the correct position and orientation like that? I suspect it will be difficult to do it reliably and cheaply for billions of transistors at a time.

yvdriess 15y ago

The mass production of transistors is completely thanks to its relatively etching process. I wonder if we will see a relatively similar process for alternative transistor technology.

foreverbanned 15y ago

They probably use an atomic force microscope (google "atomic force microscope nanomanipulation").

adestefan 15y ago

Pfft. That's an engineering problem, not a research problem. I kid a bit, but IBM does have the fabrication engineering talent to pull it off.

sliverstorm 15y ago

Probably. There's a reason we are still using 32nm silicon, even though we can experimentally fabricate graphene & gallium-arsenide transistors at sizes down to... 6nm? (That's the smallest I remember.)

johapers 15y ago

I apologize if this is a bit long: The answer can be found in the supplementary information to the article here: http://pubs.acs.org/doi/suppl/10.1021/nl203701g/suppl_file/nl203701g_si_001.pdf http://pubs.acs.org/doi/suppl/10.1021/nl203701g/suppl_file/n... In short, they grew the nanotubes on a quarts crystal, transferred them with tape quite randomly to gates already made on a Si-wafer and then etched and metalized around these gates. They then tested a large amount of devices to find ones where a nanotube of the right kind (semiconducting) had placed itself in a correct alignment with the gate and metalized contacts (source and drain). Once they knew what devices were working they imaged some of the working devices with an Atomic Force Microscope (AFM) and did a bunch of standard transistor measurements. As was commented earlier, the specific growth of nanotubes in a well defined position is not easily achieved. There is IMO a long time until anyone can do a full chip where nanotubes grow exactly where one wants the transistors. It might even be that graphene is a more convenient technology for just this reason (since graphene can be grown somewhat more conveniently by annealing SiC wafers). A side note I guess is that growing nanotubes and pillars vertically can be done in specific spots on a wafer, but that makes manufacturing of the gate a bit problematic. And I do not know wheter carbon nanotubes can be grown selectively this way.