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Disambiguating Arm, Arm ARM, ARMv9, ARM9, ARM64, AArch64, A64, A78, ...
- drcongo 4y agoI think I'm more confused now than I was before.
- ndesaulniers 4y agoSame!
- zamnos 4y agoI don't want it to be lost on others so I'll explain it (this kills the joke, unfortunately), ndesaulniers is the author of the linked article.
- drcongo 4y agoHa, I should clarify that I'm not more confused because the article didn't do its job, but because it did it perfectly. I had no idea at least half of those arms existed.
- imglorp 4y agoMarketing successful [x]. Sometimes I think they work against humanity.
- aflag 4y agoI didn't know I didn't understand arm versions. Now I do know.
- electroly 4y agoSo the ARM Architectural Reference Manual (the Arm ARM) defines the three architectural profiles: A, R, and M. I'm not even mad, that's amazing.
- tux3 4y agoAnd Thumb is an ARM extension. Their naming is full of awful puns
- Teongot 4y agoThumb-2 was internally codenamed Wrist. Because it's between ARM and Thumb
- layer8 4y agoTangentially related, at one point Palm gained ARM support: https://en.wikipedia.org/wiki/Palm_Tungsten https://en.wikipedia.org/wiki/Palm_Tungsten
- RcouF1uZ4gsC 4y agoWith ARM now in the data center, you can easily write an ARM REST server.
- deleted 4y ago
- yakubin 4y agoWhat’s an execution state? From my reading of this post, it doesn’t seem to be an architecture.
- Leherenn 4y agoMost modern OSes (recent MacOs excluded) are 64-bit, but can run both 32 and 64-bit programs. When such OSes run a 64-bit program, they are in 64-bit execution state and when they run a 32-bit program, in 32-bit execution state. Basically, the processor switches execution state depending on what is being run, and in a way "emulates" a 32-bit processor by restricting registers and so on to be compatible with the 32-bit arch.
- 1000100_1000101 4y agoThat's just the start of it. On Arm you also have the secure state and exception level. Non-Secure EL0 is user space, with limited access to system registers. Non-Secure EL1 is kernel space with more access to system registers. Non-Secure EL2 is hypervisor space with more access to system registers. EL3 is the secure monitor. I'm not sure what the secure states ELs can do, or if they have the same 3 ELs available as the non-secure side. Likely not. I've never used them, but I think the secure state is described as though intended for a set of micro-services that the Non-Secure levels can send requests to. There are extensions allowing Hypervisor EL2 to be a Secure state. A secure hypervisor may be able to manage secure and non-secure kernels. Arm allow various levels to not be implemented, supporting weird combos, like EL2 and EL0, without an EL1. The current state can also control what you're allowed to do with peripherals, like the interrupt controller. Even if provided access to the GIC's full register set, code running in a non-secure state cannot reconfigure or induce a secure interrupt. Any such requests will be ignored. Secure and non-secure accesses to memory may read from entirely different RAM chips. ...The execution state gets kinda complicated.
- monocasa 4y ago> I'm not sure what the secure states ELs can do, or if they have the same 3 ELs available as the non-secure side. Likely not. I've never used them, but I think the secure state is described as though intended for a set of micro-services that the Non-Secure levels can send requests to. > There are extensions allowing Hypervisor EL2 to be a Secure state. A secure hypervisor may be able to manage secure and non-secure kernels. So the extension isn't to allow a normal EL2 access to secure state, but instead to run a hypervisor to allow several SEL1 secure OSs. It wouldn't be weird to run one hypervisor in SEL2 and another in EL2 with SEL2 multiplexing a few trusted OSs and EL2 multiplexing several OSs as a standard heypervisor. Both would run on top of the EL3 monitor.
- ghotli 4y agoThis is useful context but seems incomplete without direct links to the gcc docs for both arm and aarch64. For your perusal. :) https://gcc.gnu.org/onlinedocs/gcc-12.2.0/gcc/ARM-Options.html#ARM-Options https://gcc.gnu.org/onlinedocs/gcc-12.2.0/gcc/ARM-Options.ht... https://gcc.gnu.org/onlinedocs/gcc-12.2.0/gcc/AArch64-Options.html#AArch64-Options https://gcc.gnu.org/onlinedocs/gcc-12.2.0/gcc/AArch64-Option...
- ndesaulniers 4y agoI had a reference to https://sourceware.org/binutils/docs/as/AArch64-Extensions.html https://sourceware.org/binutils/docs/as/AArch64-Extensions.h... that I cut from my rough draft that I do miss.
- orthoxerox 4y agoAnd they say it's Microsoft that is bad at naming their products.
- Narishma 4y agoThey are.
- schemescape 4y agoTimely, but not quite what I needed (unless I missed something in the article—pretty likely). I just spent a bunch of time setting up a Raspberry Pi 1 B with Alpine Linux, and it was surprisingly difficult to find the right strings of gibberish to get everything set up. The Alpine packages are “armhf” and the last 2 letters I think mean it has hardware floating point support. The kernel is armv6l and I still don’t know what the last letter is for. Cross-compiling for it can be annoying, but I seem to be able to pass the CPU name directly (I don’t remember it off-hand, but it’s more easily Google-able) to get things to build properly. I don’t really have a point, just venting…
- codetrotter 4y ago> I just spent a bunch of time setting up a Raspberry Pi 1 B with Alpine Linux But why? That’s ancient! I’ve got a few different models of Pi’s laying around and even the 3B+ ones feel old at this point! The oldest one that I have is surely an RPi 1 Model B as well! Because it has dual USB ports and no more USB than that. Haven’t used this one for ages tho, but still have it sitting on my desk here. Edit: Specifically, after looking at some more images and details online, the oldest mentioned Pi that I have in my possession seems to be a Raspberry Pi 1 Model B Rev 2.1 (UK) model.
- schemescape 4y agoIt’s just what I had available. I wanted to see how much I could do with it. It’s surprisingly capable! But very slow.
- codetrotter 4y agoWell, that’s still better than me. You putting your old Raspberry Pi to use, while me having my old Pi’s sitting unused just because the newer ones I have are faster :) And meanwhile I have a couple old PowerPC macs that I plan to put to use, which may at this point be slower even than the RPi 1 B I have and am not using :p
- asddubs 4y ago
- anonymousDan 4y agoThis has cleared up a lot of confusion for me! Slightly tangential, but can people recommend a good site for finding hardware available to purchase for specific ARM versions? In particular, when hardware implementing a new ARM version (e.g. 8.5 or 9) becomes available, where should I be keeping an eye on? Alternatively, what manufacturers are usually the first to produce new ARM hardware?
- invalidator 4y agoIf you're looking for chips / SOCs which implement a given arch, this Wikipedia template from the article is pretty good: https://en.wikipedia.org/wiki/Template:Application_ARM-based_chips https://en.wikipedia.org/wiki/Template:Application_ARM-based... If you want to find a consumer device which implements a specific arch, you can take the list of SOCs from above, and select them in "Chipset" in GSMArena's search: https://www.gsmarena.com/search.php3 https://www.gsmarena.com/search.php3?
- matt_d 4y agoAArch64 SoC features: https://marcin.juszkiewicz.com.pl/download/tables/arm-socs.html https://marcin.juszkiewicz.com.pl/download/tables/arm-socs.h... https://github.com/hrw/arm-socs-table https://github.com/hrw/arm-socs-table
- s-wilson-x10-6 4y agodon’t forget arm26
- userbinator 4y agoDo you mean ARM926? That was a very common core in dumbphones.
- timthorn 4y agoI don't think arm26 was a typo: https://en.m.wikipedia.org/wiki/26-bit_computing https://en.m.wikipedia.org/wiki/26-bit_computing Check the parent's username.
- peterfirefly 4y agoAlmost certainly not. https://en.wikichip.org/wiki/arm/26-bit_architectures https://en.wikichip.org/wiki/arm/26-bit_architectures https://en.wikipedia.org/wiki/26-bit_computing https://en.wikipedia.org/wiki/26-bit_computing Flags, processor mode, and the PC (24-bit) were kept in the same 32-bit word. That made it cheaper to store/restore on interrupt and, boy, did they want interrupt handling to be fast! Combined with the requirement for naturally aligned instructions, this gives the original ARM a 26-bit address space for code. They chose to make that the address space for everything -- so the address space was 64MB. The ARM926 came much later.
- peterfirefly 4y agoIf you are Sophie, I'd just like to say thanks.
- mrlonglong 4y agoYes indeed the entire world relies on ARM products ! Britain found a better way to conquer the world TIL ...
- klelatti 4y agoJust to add my thanks too. I saw Steve Furber do a presentation about the first ARM CPU in 1986, never thought I’d be typing this on an Arm powered device 37 years later.
- userbinator 4y agoApple platforms diverge from Arm’s ABI in specific ways. ...and so does Microsoft with its ARM64EC ABI: https://learn.microsoft.com/en-us/cpp/build/arm64ec-windows-abi-conventions https://learn.microsoft.com/en-us/cpp/build/arm64ec-windows-... I've always thought it odd that a CPU manufacturer would specify an ABI, since that seems to imply preference towards certain programming languages and techniques which may or may not be ideal in all cases; Intel certainly didn't.
- monocasa 4y agoIntel probably wishes they did. That's because ultimately having code generally follow a common structure gives you as a uarch designer a bit more to work with wrt how RTL micro-optimizations affect your customers' code. Towards that end, the different AArch64 ABIs are pretty minor morphs when compared to the clusters that are x86 ABIs.
- moonchild 4y agoThis statement confuses me. There are two ABIs in common use on 64-bit x86. One is used on windows; the other is used everywhere else, and intel has been involved in its specification (I believe its current editor is an intel employee). Most concerns relating to ABI specification can be dealt with pursuant only to architecture, not microarchitecture; minimising instruction or byte counts, say. And architectures have long lives, over the course of which microarchitectures may change quite a lot. You wouldn't want your ABI to be overfit to one particular microarchitecture. Not to say that it's a bad thing for a processor or architecture vendor to supply a standard ABI. It's good to have cohesion and consistency, and furthermore, if you have designed an architecture, then you have (one really, really hopes) performed a lot of experiments to see what code for that architecture looks like, so you are in a good position to be specifying an ABI. But that's not to say a third party is per se in a worse position to be specifying an ABI. And of course, stable binary interfaces are dying (and good riddance!), but that's a separate issue.
- monocasa 4y agoYeah, they cleaned up x86-64, but x86-32 had three calling conventions on windows alone.
- zeroimpl 4y agoSo when I run “uname -m” on Mac it says “arm64”, but running it in a docker container on the Mac it says “aarch64”. Doesn’t seem like everybody is in agreement.
- ndesaulniers 4y agoThat was the first thing I hit when compiling the Linux kernel on Macos!
- yjftsjthsd-h 4y agoIt's traditional; before that we had amd64 AKA x86_64 AKA x64
- jakogut 4y agoDocker on other-than-Linux platforms runs in a Linux virtual machine, because there's no containers without Linux. Running uname in a container then reports what you would see in Linux, not what the host reports.
- fathyb 4y agoI was surprised to find out that Docker now installs as a VM by default even on Linux, unless you choose to install the Docker Engine manually. https://docs.docker.com/get-docker/ https://docs.docker.com/get-docker/
- jakogut 4y agoInteresting, that's also news to me. I wonder what the purpose for that is? I suppose it's possible to control the kernel version and cgroup configuration more easily that way, but I imagine networking and filesystem access becomes more complicated.
- shandor 4y agoThey go into the details quite nicely in their documentation [1]. A more cynical take would be to wonder if it has anything to do with their steps trying to monetize Docker Desktop. This move puts the same stack in use with Linux, maybe giving them monetization on Linux as well. (Not that there’s anything wrong with that. You can still use the Docker Engine freely on Linux if you want. ) [1] https://docs.docker.com/desktop/faqs/linuxfaqs/#why-does-docker-desktop-for-linux-run-a-vm https://docs.docker.com/desktop/faqs/linuxfaqs/#why-does-doc...
- askvictor 4y agoWhy would someone name it ARM64 when it looks so similar to AMD64. I'm sure that has caused some confusion or things to break (or will do so at some point). Naming things is a usability issue.
- MarkSweep 4y agoI have fixed this exact typo before. The visual similarity is annoying. https://github.com/dotnet/runtime/commit/1f4835129630f12008db2c920bb3f2973def7eda https://github.com/dotnet/runtime/commit/1f4835129630f12008d...
- fl0ps 4y agoBookmarked (and appreciated!) solely to let me be lazy and send a link instead of repeating the same speech to other devs.
- ndesaulniers 4y agoThat's why I wrote it!
- AdamH12113 4y agoGood old ARM naming schemes. I remember some amusement when I worked at TI and my team went from working on an ARM7-based microcontroller to an ARMv7-based microcontroller. (The ARM7 was an ARMv4 CPU, naturally.)
- timthorn 4y agoAnd now the Arm (Neoverse) V1 is Armv8
- otabdeveloper4 4y agoHaving read all that I am now even more confused and ambiguated. Technical writing is hard.
- DeathArrow 4y agoI though ARM is an acronym of ARM Rephrases Meanings.