4 ms·

That would be a great home server machine. But would like to know the price, and to better understand this "pseudo-ECC"

wil421 4y ago
In-band ECC is likely a lot more marketing speak and a lot less ECC. The way I look at ECC is like this, no extra die no ECC. In band “ECC” DIMMS store the ECC bits on the same memory chips using the same lanes as the data. Side band ECC uses dedicate lanes and a dedicated memory chip. If you don’t have 9 chips on your RAM sticks you have some marketing version of ECC (cheaper).
- wmf 4y ago
  In-band ECC isn't as strong as chipkill but it will correct errors. It's not fake.
  - wil421 4y ago
    I didn’t call it fake but I am hesitant to adopt something that doesn’t have a need. Is it better and more reliable or is it cheaper for the manufacturer to produce? My money is on it being cheaper to produce and with no benefit to the consumer. The anandtech author even states in band deserves more investigation. ZFS stores the error correcting bits on the same physical drive as the data. It’s not unheard of to do it that way.
    - wmf 4y ago
      My money is on it being cheaper to produce and with no benefit to the consumer. This is completely wrong. You're just making up theories. ZFS stores the error correcting bits on the same physical drive as the data. This isn't right either.
      - IgorPartola 4y ago
        Yes it is? ZFS can use multiple drives. But each block and it’s checksum do live next to each other on the same zpool.
      - deleted 4y ago
        [deleted]
      - deleted 4y ago
        [deleted]
      - wil421 4y ago
        Why shift from a dedicated memory channel and chip to a shared one? The FreeNAS/TrueNAS community has worried about situations like the scrub of death (no ecc). Others on the forum below think the same about consumer DDR5 “ecc”. https://www.truenas.com/community/threads/ddr5-“ecc”-and-zfs.97931/ https://www.truenas.com/community/threads/ddr5-“ecc”-and-zfs...
        wmf 4y ago
        On-chip ECC and in-band ECC are completely different and unrelated. I see what pattern you're matching here, but... don't.
        toast0 4y ago
        > Why shift from a dedicated memory channel and chip to a shared one? Cost, mostly; maybe pincount and routing at some level as well (I think current connectors have pins for ecc, but maybe this enables some pinsaving for ddr6 or the new ram connector from Dell?). But also maybe performance? ECC ram usually doesn't come in high performance models, but with in-band, you can use whatever ram. Clearly, there is a performance penalty for in-band vs no ECC with the same ram, and there's almost certainly a penalty for in-band vs side-band at the same ram timings, but is there a benefit for in-band with faster ram vs side-band with conservative ram? Maybe? need approrpriate benchmarks. If this has similar reporting to machine check exceptions that proper side-band ECC supports, this may be an easier path to get ECC on low end machines than hoping all the stars are aligned for ECC support and then paying a significant premium for the ram. DDR5's on chip ECC probably increases reliability, but also means failures will be worse. You'll always have at least two bits flipped if bits are flipped on the chip, because single bit errors will be corrected. It's not clear what will happen with errors that are detectable but not correctable, since, AFAIK, there's no mechanism to report errors.
    - bpye 4y ago
      It means that customers that don’t care for ECC aren’t paying for it. If you want ECC the option is available, at the cost of a few GB storage. If we had this with desktop hardware it might even be preferable to standard ECC for workstation type use as it doesn’t require ECC DIMMs.
  - csdvrx 4y ago
    Not ECC to me. I want to see the reports with EDAC or something else.
    - wmf 4y ago
      Like this? https://patchwork.kernel.org/project/linux-edac/patch/20201105074914.3866-1-qiuxu.zhuo@intel.com/ https://patchwork.kernel.org/project/linux-edac/patch/202011...
amelius 4y ago
The price is $700 (bare-bones) to $1050 (the configuration as discussed in the article without OS).
- tpowell 4y ago
  I know it's apples vs oranges for a lot of folk' applications, but boy does the updated M2 Mac Mini starting at $549 (at time of comment) seem like a steal.
  - pbronez 4y ago
    Yeah… although every time I poke at it I add the M2 Pro and 10GBASET… Also Apple’s memory and storage pricing is insane. Guess that’s the point of the upgraded network and unified memory though? Have a fast NAS on a 10G network and work that way.
coder543 4y ago
> and to better understand this "pseudo-ECC" Page 2 discusses it in great depth: https://www.anandtech.com/show/18732/asrock-industrial-nucs-box1360pd4-review-raptor-lakep-ecc/2 https://www.anandtech.com/show/18732/asrock-industrial-nucs-... tl;dr it reserves 3% of your RAM for ECC parity/check values, which is all handled transparently without your operating system needing to know anything.

In-band ECC is likely a lot more marketing speak and a lot less ECC. The way I look at ECC is like this, no extra die no ECC. In band “ECC” DIMMS store the ECC bits on the same memory chips using the same lanes as the data. Side band ECC uses dedicate lanes and a dedicated memory chip. If you don’t have 9 chips on your RAM sticks you have some marketing version of ECC (cheaper).

wmf 4y ago
In-band ECC isn't as strong as chipkill but it will correct errors. It's not fake.
- wil421 4y ago
  I didn’t call it fake but I am hesitant to adopt something that doesn’t have a need. Is it better and more reliable or is it cheaper for the manufacturer to produce? My money is on it being cheaper to produce and with no benefit to the consumer. The anandtech author even states in band deserves more investigation. ZFS stores the error correcting bits on the same physical drive as the data. It’s not unheard of to do it that way.
  - wmf 4y ago
    My money is on it being cheaper to produce and with no benefit to the consumer. This is completely wrong. You're just making up theories. ZFS stores the error correcting bits on the same physical drive as the data. This isn't right either.
    - IgorPartola 4y ago
      Yes it is? ZFS can use multiple drives. But each block and it’s checksum do live next to each other on the same zpool.
    - deleted 4y ago
      [deleted]
    - deleted 4y ago
      [deleted]
    - wil421 4y ago
      Why shift from a dedicated memory channel and chip to a shared one? The FreeNAS/TrueNAS community has worried about situations like the scrub of death (no ecc). Others on the forum below think the same about consumer DDR5 “ecc”. https://www.truenas.com/community/threads/ddr5-“ecc”-and-zfs.97931/ https://www.truenas.com/community/threads/ddr5-“ecc”-and-zfs...
      - wmf 4y ago
        On-chip ECC and in-band ECC are completely different and unrelated. I see what pattern you're matching here, but... don't.
      - toast0 4y ago
        > Why shift from a dedicated memory channel and chip to a shared one? Cost, mostly; maybe pincount and routing at some level as well (I think current connectors have pins for ecc, but maybe this enables some pinsaving for ddr6 or the new ram connector from Dell?). But also maybe performance? ECC ram usually doesn't come in high performance models, but with in-band, you can use whatever ram. Clearly, there is a performance penalty for in-band vs no ECC with the same ram, and there's almost certainly a penalty for in-band vs side-band at the same ram timings, but is there a benefit for in-band with faster ram vs side-band with conservative ram? Maybe? need approrpriate benchmarks. If this has similar reporting to machine check exceptions that proper side-band ECC supports, this may be an easier path to get ECC on low end machines than hoping all the stars are aligned for ECC support and then paying a significant premium for the ram. DDR5's on chip ECC probably increases reliability, but also means failures will be worse. You'll always have at least two bits flipped if bits are flipped on the chip, because single bit errors will be corrected. It's not clear what will happen with errors that are detectable but not correctable, since, AFAIK, there's no mechanism to report errors.
  - bpye 4y ago
    It means that customers that don’t care for ECC aren’t paying for it. If you want ECC the option is available, at the cost of a few GB storage. If we had this with desktop hardware it might even be preferable to standard ECC for workstation type use as it doesn’t require ECC DIMMs.
- csdvrx 4y ago
  Not ECC to me. I want to see the reports with EDAC or something else.
  - wmf 4y ago
    Like this? https://patchwork.kernel.org/project/linux-edac/patch/20201105074914.3866-1-qiuxu.zhuo@intel.com/ https://patchwork.kernel.org/project/linux-edac/patch/202011...

amelius 4y ago

The price is $700 (bare-bones) to $1050 (the configuration as discussed in the article without OS).

tpowell 4y ago
I know it's apples vs oranges for a lot of folk' applications, but boy does the updated M2 Mac Mini starting at $549 (at time of comment) seem like a steal.
- pbronez 4y ago
  Yeah… although every time I poke at it I add the M2 Pro and 10GBASET… Also Apple’s memory and storage pricing is insane. Guess that’s the point of the upgraded network and unified memory though? Have a fast NAS on a 10G network and work that way.

coder543 4y ago

> and to better understand this "pseudo-ECC" Page 2 discusses it in great depth: https://www.anandtech.com/show/18732/asrock-industrial-nucs-box1360pd4-review-raptor-lakep-ecc/2 https://www.anandtech.com/show/18732/asrock-industrial-nucs-... tl;dr it reserves 3% of your RAM for ECC parity/check values, which is all handled transparently without your operating system needing to know anything.