3 ms·

Maybe I'm missing something here? This line read like a joke / sarcasm to me. But RISC did change everything, didn't it?

chaosite 4y ago
It's a quote from Hackers (1995). https://www.youtube.com/watch?v=wPrUmViN_5c https://www.youtube.com/watch?v=wPrUmViN_5c
- newswasboring 4y ago
  I just rewatched that clip, did the writer transition from technobable to relationship dialogue? Because the scene has this tension and saying "RISC is good" can also be heard as "risk is good".
  - doublerabbit 4y ago
    Could be a double entendre? Great film.
  - kQq9oHeAz6wLLS 4y ago
    Yes, that was very intentional
- aussieshibe 4y ago
  Thanks, somehow I've never seen this movie.
kevin_thibedeau 4y ago
Superscalar processors are a bigger advancement.
asveikau 4y ago
> But RISC did change everything, didn't it? Iirc it's not such a meaningful distinction anymore. "CISC" x86 uses micro-operations internally. "RISC" ARM has several different instruction encodings (ARM, Thumb, Thumb-2, A64). Increasing numbers of people are working in high level languages anyway.
- msla 4y ago
  > "CISC" x86 uses micro-operations internally. Like generations of CISC before it. That doesn't make it any less CISC. https://userpages.umbc.edu/~vijay/mashey.on.risc.html https://userpages.umbc.edu/~vijay/mashey.on.risc.html From that page, which collects a number of Usenet posts by John Mashey: > The RISC characteristics: > a) Are aimed at more performance from current compiler technology (i.e., enough registers). > OR > b) Are aimed at fast pipelining > - in a virtual-memory environment > - with the ability to still survive exceptions > - without inextricably increasing the number of gate delays (notice that I say gate delays, NOT just how many gates). The point b is where RISC chips really pulled away from CISC in terms of architectural design, especially chips like the MIPS, which Mashey worked on: The MIPS had a number of points where it exposed the tricks it used to pipeline more aggressively, even at the expense of making compilers somewhat harder to write and/or human assembly-language programmers think a bit harder. However, the lack of complicated addressing modes (post-increment, scale-and-offset, etc.) and the lack of register-memory opcodes with ALU operations, and total lack of memory-memory operations, is still a very common feature of RISC design.
- bee_rider 4y ago
  That seems like RISC changing everything. How much did it change things? CISC has been transformed from a true competitor to RISC to a sort of abstraction layer on top of it.
  - astrange 4y ago
    That's not really true. x86 chips are not secretly RISC inside; the microcode often corresponds to individual instructions, it has complex things like 'lea' that are quite efficient, and you can't really abstract away things like variable length instructions.
- astrange 4y ago
  AArch64 only has one instruction encoding. I think it's a bit too complex to be RISC though. On the other hand, it's simpler than ARMv7 - not just because of getting rid of Thumb, it also doesn't have conditional execution.
Gordonjcp 4y ago
Well yeah, kind of. In the olden days we thought that massively complex instructions on chips with huge microcode would be just the thing. Simplify your code by calling a single machine code instruction that does a complete matrix manipulation, or solves a polynomial, kind of thing. It turned out that making CPUs that worked that way was expensive and complicated, and if they didn't quite work you were stuck with it. Then, it further turned out that actually it was easier to be Good At Software than it was to be Good At Hardware. If you wrote a clever assembler, and a clever compiler, and some clever libraries, you still didn't need to care about solving horrible maths, you just called a function to do it. And then, we came around to the idea that it was faster to use small simple instructions and cache a lot of them, and keep as many of the values we were juggling in registers so you didn't waste time with a memory cycle. So, CPUs got simpler instruction architectures and all that space previously used for selecting ever increasingly baroque instructions in the opcode could be used to select from an ever-growing number of registers. Ultimately CPUs will be only able to do a lsl, mov, add, and xor, in a single conditional instruction, with 131072 64-bit registers to choose from, in a single clock cycle at 10GHz or so. People will still say "well yeah but do you really need that add?"
kllrnohj 4y ago
RISC changed everything just like CISC did. It was a product of changing times & tradeoffs. Both RISC and CISC are effectively marginalized, though. The current trend for everything beyond embedded is somewhere kinda in the middle. With the some pretty pointless nitpicking about if something is or isn't RISC and devolving that entire movement down to just "but it doesn't do memory indexing!" or whatever. It turns out what makes a fast processor is something that uses both RISC and CISC ideas. And that's what nearly everything does these days as a result, because speed is all that matters

chaosite 4y ago

It's a quote from Hackers (1995). https://www.youtube.com/watch?v=wPrUmViN_5c https://www.youtube.com/watch?v=wPrUmViN_5c

newswasboring 4y ago
I just rewatched that clip, did the writer transition from technobable to relationship dialogue? Because the scene has this tension and saying "RISC is good" can also be heard as "risk is good".
- doublerabbit 4y ago
  Could be a double entendre? Great film.
- kQq9oHeAz6wLLS 4y ago
  Yes, that was very intentional
aussieshibe 4y ago
Thanks, somehow I've never seen this movie.

kevin_thibedeau 4y ago

Superscalar processors are a bigger advancement.

asveikau 4y ago

> But RISC did change everything, didn't it? Iirc it's not such a meaningful distinction anymore. "CISC" x86 uses micro-operations internally. "RISC" ARM has several different instruction encodings (ARM, Thumb, Thumb-2, A64). Increasing numbers of people are working in high level languages anyway.

msla 4y ago
> "CISC" x86 uses micro-operations internally. Like generations of CISC before it. That doesn't make it any less CISC. https://userpages.umbc.edu/~vijay/mashey.on.risc.html https://userpages.umbc.edu/~vijay/mashey.on.risc.html From that page, which collects a number of Usenet posts by John Mashey: > The RISC characteristics: > a) Are aimed at more performance from current compiler technology (i.e., enough registers). > OR > b) Are aimed at fast pipelining > - in a virtual-memory environment > - with the ability to still survive exceptions > - without inextricably increasing the number of gate delays (notice that I say gate delays, NOT just how many gates). The point b is where RISC chips really pulled away from CISC in terms of architectural design, especially chips like the MIPS, which Mashey worked on: The MIPS had a number of points where it exposed the tricks it used to pipeline more aggressively, even at the expense of making compilers somewhat harder to write and/or human assembly-language programmers think a bit harder. However, the lack of complicated addressing modes (post-increment, scale-and-offset, etc.) and the lack of register-memory opcodes with ALU operations, and total lack of memory-memory operations, is still a very common feature of RISC design.
bee_rider 4y ago
That seems like RISC changing everything. How much did it change things? CISC has been transformed from a true competitor to RISC to a sort of abstraction layer on top of it.
- astrange 4y ago
  That's not really true. x86 chips are not secretly RISC inside; the microcode often corresponds to individual instructions, it has complex things like 'lea' that are quite efficient, and you can't really abstract away things like variable length instructions.
astrange 4y ago
AArch64 only has one instruction encoding. I think it's a bit too complex to be RISC though. On the other hand, it's simpler than ARMv7 - not just because of getting rid of Thumb, it also doesn't have conditional execution.

Gordonjcp 4y ago

Well yeah, kind of. In the olden days we thought that massively complex instructions on chips with huge microcode would be just the thing. Simplify your code by calling a single machine code instruction that does a complete matrix manipulation, or solves a polynomial, kind of thing. It turned out that making CPUs that worked that way was expensive and complicated, and if they didn't quite work you were stuck with it. Then, it further turned out that actually it was easier to be Good At Software than it was to be Good At Hardware. If you wrote a clever assembler, and a clever compiler, and some clever libraries, you still didn't need to care about solving horrible maths, you just called a function to do it. And then, we came around to the idea that it was faster to use small simple instructions and cache a lot of them, and keep as many of the values we were juggling in registers so you didn't waste time with a memory cycle. So, CPUs got simpler instruction architectures and all that space previously used for selecting ever increasingly baroque instructions in the opcode could be used to select from an ever-growing number of registers. Ultimately CPUs will be only able to do a lsl, mov, add, and xor, in a single conditional instruction, with 131072 64-bit registers to choose from, in a single clock cycle at 10GHz or so. People will still say "well yeah but do you really need that add?"

kllrnohj 4y ago

RISC changed everything just like CISC did. It was a product of changing times & tradeoffs. Both RISC and CISC are effectively marginalized, though. The current trend for everything beyond embedded is somewhere kinda in the middle. With the some pretty pointless nitpicking about if something is or isn't RISC and devolving that entire movement down to just "but it doesn't do memory indexing!" or whatever. It turns out what makes a fast processor is something that uses both RISC and CISC ideas. And that's what nearly everything does these days as a result, because speed is all that matters