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I like the idea of a newer language but inevitably it feels like anything not Verilog or vhdl is missing direct tooling support from the vendors. Do any vendor
by bfrog 4y ago
I like the idea of a newer language but inevitably it feels like anything not Verilog or vhdl is missing direct tooling support from the vendors.
Do any vendors intend on supporting chisel? Does chisel have enough control to ensure generated vhdl/Verilog match the what vendors look for to infer certain things like certain ram and dsp instances? Does chisel have a fast simulator like ghdl?
- fayalalebrun 4y agoChisel is compiled to Verilog so it has excellent interoperability. You can use Chisel in an existing Verilog project or use existing Verilog modules in a Chisel project. Therefore it is already supported by practically all vendors and simulators. I've used Chisel to interface with proprietary Lattice DSPs and RAM modules, and I'm sure you could do the same with other vendors as well. All you have to do is define the IOs and parameters of the module. In Chisel this is called a "Blackbox". Example: https://github.com/fayalalebrun/6502-exp/blob/master/src/main/scala/blackbox/LatticeFIFO.scala https://github.com/fayalalebrun/6502-exp/blob/master/src/mai...
- IshKebab 4y agoI haven't used Chisel yet but looking at the home page it looks like it generates surprisingly readable Verilog with source mapping. Also there's a project called FireSim that can do cycle accurate simulation of Chisel on cloud FPGAs apparently at 10-100MHz which is pretty crazy!