4 ms·
> I would expect the -O2 numbers to reflect better the actual ISA capabilities. I will have a more thorough look at -O2 too, good point. However w.r.t. "ISA c
by mbitsnbites 4y ago
> I would expect the -O2 numbers to reflect better the actual ISA capabilities.
I will have a more thorough look at -O2 too, good point.
However w.r.t. "ISA capabilities" the simple fact is that compilers don't use CISC style instructions. They prefer RISC style load/store + many GPRs code, and new x86_64 instructions are modelled after this paradigm. Hence I wouldn't expect there to be a huge difference at -O2 (and in my experience x86_64 often loses at -O2 too).
- fweimer 4y agoI think for x86-64, the 32-bit immediate operands totally qualify as CISC-style because they contribute to the variable length nature of the instruction encoding. And GCC uses them all the time, of course. GCC has a surprising tendency to use the string instructions for memset and memcpy, too. In the other direction, without -march=x86-64-v3, GCC cannot even use most of the more RISC-style three-operand instructions.
- mbitsnbites 4y agoThe 32-bit operands are actually hurting code density most of the time. An instruction that would take 4 bytes in a RISC ISA takes at least 5 bytes in a CISC ISA. Same thing with the 32-bit offsets for x86_64 conditional branches. Edit: With "CISC style" I meant those instructions that use implicit registers instead of GPRs and/or do fancy multi-operation stuff, like LOOP or POPA/PUSHA etc.