3 ms·
Gate-level simulation (even zero-delay, let's not mention delay-aware or even power-aware) for a modern-sized CPU takes weeks just to run through some basic liv
by iron2disulfide 4y ago
Gate-level simulation (even zero-delay, let's not mention delay-aware or even power-aware) for a modern-sized CPU takes weeks just to run through some basic liveliness checks. See [1] for just a taste of gate-level simulation trickiness:
[1] https://www.deepchip.com/items/0591-01.html https://www.deepchip.com/items/0591-01.html
- nerpderp82 4y agoYou can do an RV32I in 10k gates, RV64GC in maybe 30k gates? I think the GP meant barely enough to run a thin OS, but not an antique. In-order, small to no cache, you get it. A visual RV64GC would be a pedagogical tool, not something necessary for a tape out.