4 ms·

AMD’s Zen 4 Part 1: Front End and Execution Engine

53 points by zdw 4y ago

aunty_helen 4y ago
Wow this is a depth of reporting on cpu arch changes I’ve never seen the likes of. I saw a few weeks ago posted here someone wanting to know how to get into the cpu arch space. Understanding everything within would be a good start
- ls65536 4y ago
  Agreed. This is very fascinating stuff to help understand what's really happening at that low level in these new chips and how this can impact software performance, the intricate details of which are sometimes only sparsely available online and usually not as approachable. They also had an excellent one posted just a few weeks ago on the Intel Skylake architecture in case you hadn't yet seen it: https://chipsandcheese.com/2022/10/14/skylake-intels-longest-serving-architecture/ https://chipsandcheese.com/2022/10/14/skylake-intels-longest...
- alberth 4y ago
  And this is just Part 1
  - clamchowder 4y ago
    Yeah, will have Part 2 up shortly (author here). If you try to make a Wordpress post too long, typing gets extremely laggy to the point of being unusable. So splitting it into two parts lets me go a little more in depth without waiting two seconds for a word to show up after I type it.
    - smueller1234 4y ago
      Thank you for what you do. Your articles are what I've been scouring the internet for since the demise of RWT!
- rektide 4y ago
  A decade plus ago, the deep details were much better reported. Every little cache change, pipeline tweak was known & reported. Sites like Real World Tech with Kanter would go even deeper to find every little nuance & difference they could. We used to be into details, super hard. Things have just broadly gotten much stupider, much more generic. Reporting has gotten superficial. Chips & cheese makes it feel like 1999 again. Back when people bothered to know & care & follow the advance.
- rbanffy 4y ago
  This is the kind of stuff I liked in magazines such as BYTE. So dearly missed...
whinvik 4y ago
Naive question but is the architecture trying so much to optimize branch prediction because software is more and more dominated by conditional logic(if statements)?
- gary_0 4y ago
  No, the amount of conditional logic in code is more or less the same. But memory is as slow as ever relative to the CPU, which means the CPU wants to start reading in the instructions it will need as soon as possible. Without good branch prediction, the CPU would spend too much time waiting for memory to give it more instructions after a branch. Modern CPUs also don't execute one instruction at a time, they have a long and complex pipeline that they want to keep full to maximize the amount of work per clock tick. If a branch prediction fails, a lot of work in the pipeline will need to be discarded. Branch predictors also require balancing a lot of trade-offs in the silicon, so their design has evolved considerably over the years. More in-depth info about branch prediction can be found here: https://danluu.com/branch-prediction/ https://danluu.com/branch-prediction/

53 points by zdw 4y ago

Wow this is a depth of reporting on cpu arch changes I’ve never seen the likes of. I saw a few weeks ago posted here someone wanting to know how to get into the cpu arch space. Understanding everything within would be a good start

ls65536 4y ago
Agreed. This is very fascinating stuff to help understand what's really happening at that low level in these new chips and how this can impact software performance, the intricate details of which are sometimes only sparsely available online and usually not as approachable. They also had an excellent one posted just a few weeks ago on the Intel Skylake architecture in case you hadn't yet seen it: https://chipsandcheese.com/2022/10/14/skylake-intels-longest-serving-architecture/ https://chipsandcheese.com/2022/10/14/skylake-intels-longest...
alberth 4y ago
And this is just Part 1
- clamchowder 4y ago
  Yeah, will have Part 2 up shortly (author here). If you try to make a Wordpress post too long, typing gets extremely laggy to the point of being unusable. So splitting it into two parts lets me go a little more in depth without waiting two seconds for a word to show up after I type it.
  - smueller1234 4y ago
    Thank you for what you do. Your articles are what I've been scouring the internet for since the demise of RWT!
rektide 4y ago
A decade plus ago, the deep details were much better reported. Every little cache change, pipeline tweak was known & reported. Sites like Real World Tech with Kanter would go even deeper to find every little nuance & difference they could. We used to be into details, super hard. Things have just broadly gotten much stupider, much more generic. Reporting has gotten superficial. Chips & cheese makes it feel like 1999 again. Back when people bothered to know & care & follow the advance.
rbanffy 4y ago
This is the kind of stuff I liked in magazines such as BYTE. So dearly missed...

whinvik 4y ago

Naive question but is the architecture trying so much to optimize branch prediction because software is more and more dominated by conditional logic(if statements)?

gary_0 4y ago
No, the amount of conditional logic in code is more or less the same. But memory is as slow as ever relative to the CPU, which means the CPU wants to start reading in the instructions it will need as soon as possible. Without good branch prediction, the CPU would spend too much time waiting for memory to give it more instructions after a branch. Modern CPUs also don't execute one instruction at a time, they have a long and complex pipeline that they want to keep full to maximize the amount of work per clock tick. If a branch prediction fails, a lot of work in the pipeline will need to be discarded. Branch predictors also require balancing a lot of trade-offs in the silicon, so their design has evolved considerably over the years. More in-depth info about branch prediction can be found here: https://danluu.com/branch-prediction/ https://danluu.com/branch-prediction/