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> RISC was a set of design principles developed in the 1980’s that enabled hardware to get much faster and more efficient. We tend to still call modern-looking

> RISC was a set of design principles developed in the 1980’s that enabled hardware to get much faster and more efficient. We tend to still call modern-looking instruction sets “RISC-y”, but really, a bunch of the original design principles of RISC CPU’s have not stood the test of time. So let’s look at the things that have worked and not worked between the 1980’s and 2022. I think the design principles of RISC were actually on a meta level above this: take the quantitative approach, use your transistors to best serve the software you have and compilers you can build. "Nice ISA to write assembly code for" was thrown out, or at least demoted significantly. In that 80s moment in the transistor count curve, it meant simplifying the ISA very radically in order to implement fewer instructions in hard coded way without microcode, to the point of ditching HW multiply instructions. The microarchitecture could either do fast, pipelined execution or large instruction set in the transitor budget, you optimized for bang for the buck in the whole-system sense. You could make simple fast machines that were designed to run Unix (so had just enough VM, exception, etc support).

klelatti 4y ago
Largely agree with you here but I think there were two other factors in RISC's early success: 1. As microprocessors became dominant freezing complex microcode - with possible bugs - on an IC was a really bad idea. Better to run with simpler instructions and less microcode. Look at the debugging issues that National Semiconductor had with the NS32016 - which I think really hindered its adoption. 2. You needed a much smaller team to design a RISC CPU - low double figures for IBM 801, Berkeley RISC, MIPS and Arm. This opened the door to lots of experiments and business models that would not have been possible with CISC.
- _0ffh 4y ago
  Yep, RISC is really a KISS CPU, paired with the attempt to draw the maximal advantage from the potential strengths of the underlying concept. And it turned out pretty nicely imho.
- sitkack 4y ago
  Almost no systems use fixed microcode. What RISC took advantage of was decoupling the memory bus from the CPU clock rate and the introduction of instruction and data caches. RISC is a simple interface, but the internal processor complexity is as high or higher than CISC (thanks to RISC simplicity). Speculative execution, reordering instructions, hazards, branch prediction these issues are the same across both. The front end isn't this huge deal. CPUs all do the same thing, attempt to unroll huge state machines and compress time. The ISA is just a way to get that problem into the CPU.
  - klelatti 4y ago
    The key word in my comment is ‘early’. You’re right about architectures today but that explicitly wasn’t what I was talking about. Caches we’re important in the IBM 801 but your orher points don’t apply to early RISC designs.
    - sitkack 4y ago
      RISC didn't hit its stride until the early 80s, using caches. The 801 was an experiment. When the 801 shipped, almost no system had hard coded microcode. Being able to update microcode in the field isn't the reason RISC thrived.
      - klelatti 4y ago
        I can think of at least two of the RISC pioneers who have cited buggy CISC architectures / microcode as a key motivating reason for adopting RISC. I actually cited an example of a major CISC design that basically failed because it was so buggy. The early microprocessors all had hard coded microcode - Intel only had upgradeable microcode with P6 in the mid 1990s. I didn't say that it was the reason - there were many reasons - but that it was one factor. It was absolutely the case that original RISC designs were simpler to design and that helped them to get traction. Edit - just to add that caches enabled RISC to get decent performance but they were not by themselves a reason for choosing RISC over CISC.
      - abiloe 4y ago
bogomipz 4y ago
>"Nice ISA to write assembly code for" was thrown out, or at least demoted significantly." Interesting. Was the guiding principle of CISC ISAs essentially that be easy to write assembly code for then? Maybe it's obvious but I had never considered how or where CISC evolved from. Would I have to look at something like the history of the VAX ISA to understand this better?
- klelatti 4y ago
  I think 'easy to write assembly code for them' might be stretching it a little bit. Some instructions were pretty complex and I would expect be quite hard to use in practice. What is certainly true is that a single instruction could do a lot, making for much more concise code than would be the case for RISC code. IBM S/360 is probably the most influential CISC architecture. There is lots of S/360 documentation online. If of interest I did a short post on S/360 assembly a little while ago. https://thechipletter.substack.com/p/writing-ibm-s360-assembly-by-hand https://thechipletter.substack.com/p/writing-ibm-s360-assemb...
  - bogomipz 4y ago
    Thanks but your link has two sentences and then is interrupted by an input box to subscribe to your newsletter and by the time I made it to there my reading was again interrupted, this time by an obnoxious pop up prompt again asking me sign up for the newsletter. Is there a reason to be this aggressive? It's hard to believe this is a successful strategy. If someone enjoys your content they will sign up after they've actually been able read the article. Who signs up for a newsletter before they've even been able to read the first paragraph? I didn't bother with the rest of your link after this.
    - klelatti 4y ago
      Thanks for letting me know. It’s a Substack thing not something I’ve chosen to do - I’ve tried to see if I could could turn off all pop-ups in the past without success. I didn’t know it was quite that bad so will have another look and possibly feedback to Substack.
sroussey 4y ago
You mention the key part here—it was designed for compilers writing assembly, not people writing assembly. And more importantly, future compilers, not the tech they had at the time.
- pclmulqdq 4y ago
  This is probably the most important factor in the RISC revolution. The printed size of assembly doesn't matter any more (only the number of bytes), and neither does readability.
gumby 4y ago
> I think the design principles of RISC were actually on a meta level above this: take the quantitative approach, use your transistors to best serve the software you have and compilers you can build. "Nice ISA to write assembly code for" was thrown out, or at least demoted significantly. You have it right: this is almost exactly (in different words!) what Radin wrote in his original RISC paper.

klelatti 4y ago

Largely agree with you here but I think there were two other factors in RISC's early success: 1. As microprocessors became dominant freezing complex microcode - with possible bugs - on an IC was a really bad idea. Better to run with simpler instructions and less microcode. Look at the debugging issues that National Semiconductor had with the NS32016 - which I think really hindered its adoption. 2. You needed a much smaller team to design a RISC CPU - low double figures for IBM 801, Berkeley RISC, MIPS and Arm. This opened the door to lots of experiments and business models that would not have been possible with CISC.

_0ffh 4y ago
Yep, RISC is really a KISS CPU, paired with the attempt to draw the maximal advantage from the potential strengths of the underlying concept. And it turned out pretty nicely imho.
sitkack 4y ago
Almost no systems use fixed microcode. What RISC took advantage of was decoupling the memory bus from the CPU clock rate and the introduction of instruction and data caches. RISC is a simple interface, but the internal processor complexity is as high or higher than CISC (thanks to RISC simplicity). Speculative execution, reordering instructions, hazards, branch prediction these issues are the same across both. The front end isn't this huge deal. CPUs all do the same thing, attempt to unroll huge state machines and compress time. The ISA is just a way to get that problem into the CPU.
- klelatti 4y ago
  The key word in my comment is ‘early’. You’re right about architectures today but that explicitly wasn’t what I was talking about. Caches we’re important in the IBM 801 but your orher points don’t apply to early RISC designs.
  - sitkack 4y ago
    RISC didn't hit its stride until the early 80s, using caches. The 801 was an experiment. When the 801 shipped, almost no system had hard coded microcode. Being able to update microcode in the field isn't the reason RISC thrived.
    - klelatti 4y ago
      I can think of at least two of the RISC pioneers who have cited buggy CISC architectures / microcode as a key motivating reason for adopting RISC. I actually cited an example of a major CISC design that basically failed because it was so buggy. The early microprocessors all had hard coded microcode - Intel only had upgradeable microcode with P6 in the mid 1990s. I didn't say that it was the reason - there were many reasons - but that it was one factor. It was absolutely the case that original RISC designs were simpler to design and that helped them to get traction. Edit - just to add that caches enabled RISC to get decent performance but they were not by themselves a reason for choosing RISC over CISC.
    - abiloe 4y ago

bogomipz 4y ago

>"Nice ISA to write assembly code for" was thrown out, or at least demoted significantly." Interesting. Was the guiding principle of CISC ISAs essentially that be easy to write assembly code for then? Maybe it's obvious but I had never considered how or where CISC evolved from. Would I have to look at something like the history of the VAX ISA to understand this better?

klelatti 4y ago
I think 'easy to write assembly code for them' might be stretching it a little bit. Some instructions were pretty complex and I would expect be quite hard to use in practice. What is certainly true is that a single instruction could do a lot, making for much more concise code than would be the case for RISC code. IBM S/360 is probably the most influential CISC architecture. There is lots of S/360 documentation online. If of interest I did a short post on S/360 assembly a little while ago. https://thechipletter.substack.com/p/writing-ibm-s360-assembly-by-hand https://thechipletter.substack.com/p/writing-ibm-s360-assemb...
- bogomipz 4y ago
  Thanks but your link has two sentences and then is interrupted by an input box to subscribe to your newsletter and by the time I made it to there my reading was again interrupted, this time by an obnoxious pop up prompt again asking me sign up for the newsletter. Is there a reason to be this aggressive? It's hard to believe this is a successful strategy. If someone enjoys your content they will sign up after they've actually been able read the article. Who signs up for a newsletter before they've even been able to read the first paragraph? I didn't bother with the rest of your link after this.
  - klelatti 4y ago
    Thanks for letting me know. It’s a Substack thing not something I’ve chosen to do - I’ve tried to see if I could could turn off all pop-ups in the past without success. I didn’t know it was quite that bad so will have another look and possibly feedback to Substack.

sroussey 4y ago

You mention the key part here—it was designed for compilers writing assembly, not people writing assembly. And more importantly, future compilers, not the tech they had at the time.

pclmulqdq 4y ago
This is probably the most important factor in the RISC revolution. The printed size of assembly doesn't matter any more (only the number of bytes), and neither does readability.

gumby 4y ago

> I think the design principles of RISC were actually on a meta level above this: take the quantitative approach, use your transistors to best serve the software you have and compilers you can build. "Nice ISA to write assembly code for" was thrown out, or at least demoted significantly. You have it right: this is almost exactly (in different words!) what Radin wrote in his original RISC paper.