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TinyTapeout: Get your design on an actual ASIC
- bajsejohannes 4y agoFor anyone who wants to dip their toe in integrated circuits (ASIC), this project provides a way to get a tiny (~200 gate) project onto a physical chip. You can do the whole thing in the browser. Deadline for submission is September 1st.
- ahmadmijot 4y agoAre you the author? I've read the slides but can't find the details. What kind cell library this project use? I know from someone in the IC design industry said that it's kind of hard to access all the tools and semiconductor IPs without some kind of NDA or agreement with library vendors and foundry.
- q3k 4y ago(Not the author, but in the know.) This uses the Skywater 130 process. It’s backed by an open source PDK (SKY130B), and is going to be taped out via an Efabless shuttle, just like OpenMPW shuttles sponsored by Google. The difference between this and a ‘plain’ OpenMPW shuttle is that this can fit a ton of tiny/toy/demo designs, enabling a lot of people to get their toes wet with ASIC design without having to take up a ‘large’ shuttle spot. https://skywater-pdk.readthedocs.io/en/main/ https://skywater-pdk.readthedocs.io/en/main/
- thrtythreeforty 4y agoThe Skywater shuttles are never full, to the best of my knowledge. However, it is a lot of work to get off the ground with the PDK (synthesis and physical design for chips is a totally separate set of skills on top of logic design), so if this further lowers the barrier to entry then that's fantastic
- deleted 4y ago[deleted]
- rrss 4y agoThe last 3 or 4 openmpw shuttles have been full.
- thrtythreeforty 4y agoThat's great to hear, I'm glad to be corrected.
- jecel 4y agoActually, all of the open shuttles have been full with the last few oversubscribed by larger and larger margins (about 100% for MPW6 if I remember correctly). It was the commercial shuttles, called ChipIgnite, that have had space left over.
- rrss 4y agoI had in mind that OpenMPW-1 was not quite full, and looking now on efabless.com I see 37 projects submitted for MPW-1. but i don’t think it really matters - there have been lots of submissions for all of them and a ton of cool stuff, and yeah the recent open shuttles are definitely full :)
- bajsejohannes 4y agoI'm not the author, and honestly know very little about ASICs. But apparently enough to get a design onto this tapeout! :D If q3k's answer wasn't sufficient, maybe you can find more answers in the github repo that builds everything? https://github.com/mattvenn/wokwi-verilog-gds-test https://github.com/mattvenn/wokwi-verilog-gds-test Otherwise, there's a discord where the author (Matt) very active: https://discord.gg/rPK2nSjxy8 https://discord.gg/rPK2nSjxy8
- alain94040 4y agoWhat can one do with 200 gates? I struggle to think of anything interesting.
- r3013 4y agoI suppose it depends on one's interests. For example one could try to clone many of these: https://en.wikipedia.org/wiki/List_of_7400-series_integrated_circuits https://en.wikipedia.org/wiki/List_of_7400-series_integrated... Another fun project idea. Make a 1bit processor slice. Then show how many slices can make a larger system. Similar to: "Using LSI processor bit-slices to build a PDP-11—A case study in microcomputer design" https://dl.acm.org/doi/pdf/10.1145/1499402.1499444 https://dl.acm.org/doi/pdf/10.1145/1499402.1499444
- cmrdporcupine 4y agoA full 6502 is only like 900 gates. One could do a neat project with separate ALUs chips, control logic, etc, like AM2900-style. From Googling, it sounds like the 74181 ALU chip was only ~75 gates or so https://en.wikipedia.org/wiki/74181 https://en.wikipedia.org/wiki/74181. And the AM2901 something like ~500
- tdeck 4y agoThe PSP 8/s used only 519 logic gates, at least according to online sources I've found.
- tdeck 4y agoSorry PDP 8/s
- cmrdporcupine 4y agoYeah I looked at my keyboard and saw D beside S and figured that's what you're saying. Read the PDP/8 instruction sheet. Wow that's nice and minimal.
- alain94040 4y ago
- PointyFluff 4y ago
- jononor 4y ago200 gates.. Wonder if one could make a simple ADC with this, say a 8-bit successive approximation (SAR) with I2C registers for readout?
- jononor 4y agoA PWM LED constant-current driver with one-wire bus protocol. Would one only need 2 conductors, for combined power and digital control.
- klondike_ 4y agoThis already exists in commercially available form (WS2811 for example). But it might make an interesting learning exercise
- jononor 4y agoWS2811 and similar have a dedicated control signal line, and power+ground (3 leads total). I'd like to combine power and control, so that there is only two. Mostly because it allows to be compatible all the existing non-smart DC stuff.