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I work for one now, it's very challenging * very cash heavy(EDA tools, IP license, engineer wage, fab money,etc) * very challenging technically(balance

I work for one now, it's very challenging * very cash heavy(EDA tools, IP license, engineer wage, fab money,etc) * very challenging technically(balance of computation, power, size,etc) * lots of work needed on the software side(compiler,SDK,optimized libs,etc) It is in a totally different world comparing to MVP or the lean startup concept. Hardware(circuit board related) startup is already challenging(cash heavy, logistic challenges,etc), chip startup is 100x more. The later is about more than one hundred people with hundreds of millions investment to just get started.

IshKebab 4y ago
I mostly agree except that I'm not sure I'd say its very challenging technically. The logical design itself that I've seen is mostly extremely simple, just extensive. Verif is a bit fiddly but not really that hard, compared to e.g. writing a compiler or automating GUI testing. I don't know anything about physical design though; maybe that's really hard? I 100% agree with your other points though. It costs an absolute fortune, and everyone always underestimates the software effort. It's probably 5-10x the hardware effort, depending on what your chip does. Also another thing I didn't anticipate is how backwards all the tooling and people are in the chip design space. CI is a novel concept. I'm sure there are companies not using version control. Everything runs on TCL which is on par with BASIC. SystemVerilog is not a good language (though it does at least have an amazing reference manual). The standard verification method (UVM) is ok from an actual verification point of view but basically a who's who of worst practices from a programming point of view. Maybe it's different elsewhere but I was amazed how much convincing I had to do to get people to adopt practices that are just taken for granted in the software world, like auto-formatters. There are a lot of luddites. The only "ok this is actually pretty good" thing I've seen is formal verification which is basically magic.
- bsder 4y ago
  > There are a lot of luddites. In chip design, there are a lot of non-software people who have been burned by software people. Given the amounts of money flying around, there are always a lot of charlatans looking to take a chunk out of you. We used to do CI--a complete CI on our chip took 4 days. The library took 3 weeks to go through CI. Version control sucks unless your data is text--generally that's only your Verilog. Tcl is a decent enough language--the problem is that the stuff you write is no more than a one off and the real product is your chip--so nobody is going to reward you for a "good" script in any language. SystemVerilog wasn't meant to be a good language--it's an EDA vendor lockin meant to extract maximal money from hardware people. And I've seen more verification in hardware before shipping a product than I EVER have seen in any software role. Yes, even those with "good" testing.
  - a2tech 4y ago
    A sim run for a few of my customers with very basic chips might take 48-72 hours on a crazy fast machine. The designers are also SUPER concerned with getting everything right--with chip design there's no 'fixing' broken parts. If you don't get the design right when it goes to the fab, that entire run is ruined. Millions of dollars and at the bare minimum months of set back. It could kill the project or even the company.
  - IshKebab 4y ago
    > a complete CI on our chip took 4 days So rather than just say "ok we won't do simulations of the full chip in CI; we'll just do module testbenches which are much quicker" you scrapped the whole thing? > Version control sucks unless your data is text--generally that's only your Verilog. So you don't use version control because it "only" works with the most important things in your repo? > Tcl is a decent enough language Sure, compared to Bash or BASIC or other ancient terrible languages. It's pretty terrible compared to any vaguely good language. Even PHP or 90s JavaScript are leagues better. >the stuff you write is no more than a one off and the real product is your chip--so nobody is going to reward you for a "good" script in any language. Yeah I've heard this from people at my company too. So do you really completely throw away your entire infrastructure and start from scratch for every chip? If not it's hardly a "one off". And yes, people are going to reward you - your future selves will say "thank god you didn't choose to use such a bug prone language that I spend all my time fixing basic type errors". > I've seen more verification in hardware before shipping a product than I EVER have seen in any software role. For obvious reasons. Chips are much simpler than software and therefore way easier to verify, and missed bugs are extraordinarily expensive. I bet FPGAs don't get as much verification. Your post is exactly the sort of attitude I was talking about - thanks for the demonstration!
    - Arcsech 4y ago
      EXACTLY. This lazy, backwards approach to tooling and workflow is why I jumped ship from logic design to software despite having an EE degree. VHDL/Verilog tooling is heinously terrible and everyone in the industry seems to be actively opposed to doing anything about it.
- ris 4y ago
  > Maybe it's different elsewhere but I was amazed how much convincing I had to do to get people to adopt practices that are just taken for granted in the software world, like auto-formatters. Tell me more about this place where people don't get hung up on how I indent my comments.
  - tomcam 4y ago
    stop it you tease
- ThinkBeat 4y ago
  I dont think I understand the point you are making? I would not call an X64 cpu or M2 cores simple.
  - sentinalien 4y ago
    You heard IshKebab, the entire field of chip design is not very technically challenging, obviously they have the pedigree to back up such a bold statement and are too modest to tell us
  - IshKebab 4y ago
    They're obviously huge but if you looked at any small part of it you would find that it is quite simple. I don't mean the overall thing is simple, but nobody is designing the whole thing themselves. In my experience an individual software component can be much more complex than a hardware component.

IshKebab 4y ago

I mostly agree except that I'm not sure I'd say its very challenging technically. The logical design itself that I've seen is mostly extremely simple, just extensive. Verif is a bit fiddly but not really that hard, compared to e.g. writing a compiler or automating GUI testing. I don't know anything about physical design though; maybe that's really hard? I 100% agree with your other points though. It costs an absolute fortune, and everyone always underestimates the software effort. It's probably 5-10x the hardware effort, depending on what your chip does. Also another thing I didn't anticipate is how backwards all the tooling and people are in the chip design space. CI is a novel concept. I'm sure there are companies not using version control. Everything runs on TCL which is on par with BASIC. SystemVerilog is not a good language (though it does at least have an amazing reference manual). The standard verification method (UVM) is ok from an actual verification point of view but basically a who's who of worst practices from a programming point of view. Maybe it's different elsewhere but I was amazed how much convincing I had to do to get people to adopt practices that are just taken for granted in the software world, like auto-formatters. There are a lot of luddites. The only "ok this is actually pretty good" thing I've seen is formal verification which is basically magic.

bsder 4y ago
> There are a lot of luddites. In chip design, there are a lot of non-software people who have been burned by software people. Given the amounts of money flying around, there are always a lot of charlatans looking to take a chunk out of you. We used to do CI--a complete CI on our chip took 4 days. The library took 3 weeks to go through CI. Version control sucks unless your data is text--generally that's only your Verilog. Tcl is a decent enough language--the problem is that the stuff you write is no more than a one off and the real product is your chip--so nobody is going to reward you for a "good" script in any language. SystemVerilog wasn't meant to be a good language--it's an EDA vendor lockin meant to extract maximal money from hardware people. And I've seen more verification in hardware before shipping a product than I EVER have seen in any software role. Yes, even those with "good" testing.
- a2tech 4y ago
  A sim run for a few of my customers with very basic chips might take 48-72 hours on a crazy fast machine. The designers are also SUPER concerned with getting everything right--with chip design there's no 'fixing' broken parts. If you don't get the design right when it goes to the fab, that entire run is ruined. Millions of dollars and at the bare minimum months of set back. It could kill the project or even the company.
- IshKebab 4y ago
  > a complete CI on our chip took 4 days So rather than just say "ok we won't do simulations of the full chip in CI; we'll just do module testbenches which are much quicker" you scrapped the whole thing? > Version control sucks unless your data is text--generally that's only your Verilog. So you don't use version control because it "only" works with the most important things in your repo? > Tcl is a decent enough language Sure, compared to Bash or BASIC or other ancient terrible languages. It's pretty terrible compared to any vaguely good language. Even PHP or 90s JavaScript are leagues better. >the stuff you write is no more than a one off and the real product is your chip--so nobody is going to reward you for a "good" script in any language. Yeah I've heard this from people at my company too. So do you really completely throw away your entire infrastructure and start from scratch for every chip? If not it's hardly a "one off". And yes, people are going to reward you - your future selves will say "thank god you didn't choose to use such a bug prone language that I spend all my time fixing basic type errors". > I've seen more verification in hardware before shipping a product than I EVER have seen in any software role. For obvious reasons. Chips are much simpler than software and therefore way easier to verify, and missed bugs are extraordinarily expensive. I bet FPGAs don't get as much verification. Your post is exactly the sort of attitude I was talking about - thanks for the demonstration!
  - Arcsech 4y ago
    EXACTLY. This lazy, backwards approach to tooling and workflow is why I jumped ship from logic design to software despite having an EE degree. VHDL/Verilog tooling is heinously terrible and everyone in the industry seems to be actively opposed to doing anything about it.
ris 4y ago
> Maybe it's different elsewhere but I was amazed how much convincing I had to do to get people to adopt practices that are just taken for granted in the software world, like auto-formatters. Tell me more about this place where people don't get hung up on how I indent my comments.
- tomcam 4y ago
  stop it you tease
ThinkBeat 4y ago
I dont think I understand the point you are making? I would not call an X64 cpu or M2 cores simple.
- sentinalien 4y ago
  You heard IshKebab, the entire field of chip design is not very technically challenging, obviously they have the pedigree to back up such a bold statement and are too modest to tell us
- IshKebab 4y ago
  They're obviously huge but if you looked at any small part of it you would find that it is quite simple. I don't mean the overall thing is simple, but nobody is designing the whole thing themselves. In my experience an individual software component can be much more complex than a hardware component.