4 ms·

Can someone who is into chips explain how big of a thing this is? And what maybe next?

ksec 4y ago
>And what maybe next? N2 in 2025. N1.4 or may be N14A in 2027. Roughly N1 in 2030. I believe we will hit an economic wall by the end of this decade. i.e The cost of Next Gen node exceed what the market are willing to pay for it.
adam_arthur 4y ago
The biggest gains in performance and efficiency almost always come from moving to newer gen manufacturing. So pretty big deal for computing. We may be close to the age where most laptops are fanless, for example. Most non apple devices still on 7-11nm equivalents since apple gets first dibs on new gen fabs from TSMC (pay for the right)
- drexlspivey 4y ago
  > We may be close to the age where most laptops are fanless, for example. Correct me if I’m wrong but high performance fanless laptops are only possible with ARM chips atm. Has any other big laptop chip designer even announced plans for anything remotely close to M1/M2?
  - adam_arthur 4y ago
    Most efficiency gains come from manufacturing fab process, not whether it's ARM or x86. M1 is the only 5nm processor on the market right now. Yes, you will see quite comparable performance once Intel and AMD get to 5nm as well
    - jasonwatkinspdx 4y ago
      Architecture does still matter. M1's decoder is 8 issue. You just can't build that for x86 without pipeline depth or some other resulting tradeoff making it pointless.
- rowanG077 4y ago
  > So pretty big deal for computing. We may be close to the age where most laptops are fanless, for example. Doubtful since both Intel and Apple are actually INCREASING power requirements over time. Look at Apple M1 vs M2. Intel i7-1185g7 vs i7-1280p.
  - adam_arthur 4y ago
    M2 is just an overclocked M1, and thus requires more power as well. Just the same as Intel when they boost clocks for performance The manufacturing process matters far more than whatever tweaks they make intra-generation. M1 is 5nm, Intel is 7-11nm
    - rowanG077 4y ago
      I agree. But my point was that the industry in broad strokes is not moving into the direction of lower power. The opposite in fact. It's been happening for years.
    - GeekyBear 4y ago
      > M2 is just an overclocked M1 That's not what Anandtech found when they tested the performance and efficiency cores used in the A15 and M2. Performance: >In our extensive testing, we’re elated to see that it was actually mostly an efficiency focus this year, with the new performance cores showcasing adequate performance improvements, while at the same time reducing power consumption, as well as significantly improving energy efficiency. Efficiency: >The efficiency cores have also seen massive gains, this time around with Apple mostly investing them back into performance, with the new cores showcasing +23-28% absolute performance improvements, something that isn’t easily identified by popular benchmarking. This large performance increase further helps the SoC improve energy efficiency, and our initial battery life figures of the new 13 series showcase that the chip has a very large part into the vastly longer longevity of the new devices. https://www.anandtech.com/show/16983/the-apple-a15-soc-performance-review-faster-more-efficient/4 https://www.anandtech.com/show/16983/the-apple-a15-soc-perfo...
mccorrinall 4y ago
"N3 technology will offer up to 70% logic density gain, up to 15% speed improvement at the same power and up to 30% power reduction at the same speed as compared with N5 technology (According to TSMCs website). If this holds true we could see 300+ MT/mm2." https://en.wikichip.org/wiki/3_nm_lithography_process#TSMC https://en.wikichip.org/wiki/3_nm_lithography_process#TSMC
konne88 4y ago
I'd be curious to. Wikipedia seems to says that this might be mostly marketing speak. 'The term "3 nanometer" has no relation to any actual physical feature (such as gate length, metal pitch or gate pitch) of the transistors. According to the projections contained in the 2021 update of the International Roadmap for Devices and Systems published by IEEE Standards Association Industry Connection, a 3 nm node is expected to have a contacted gate pitch of 48 nanometers and a tightest metal pitch of 24 nanometers.'
dougmwne 4y ago
I can offer a broad generalization. The new manufacturing process should get us some double digit percentage gains in performance, power consumption or heat. Current Apple product designs are mainly constrained by heat as seen with the recent thermal throttling of the new MacBook Air, so a future M3 processor could be pushed a little harder before it hits its thermal limit. Performance and battery life are already pretty fantastic, so not as much of a practical difference there. The only current products that are really hurting for better chips are high powered wearables like watches, VR headsets or AR glasses. The next few years should see some tangible improvements in those products, but probably not much difference in desktop, laptop or phone. Datacenters, since they run at high utilization rates, will continue to take advantage of the cost savings of slightly more performance per watt and dollar per transistor costs.
- gameshot911 4y ago
  On the manufacturer side the chips are also smaller, which means more chips per wafer (and thus, presumably, more yield/profit), correct?
  - dougmwne 4y ago
    That is offset some by higher defect rates in newer and smaller processes and ever increasing manufacturing costs per wafer. But the metric that matters is cost per transistor. Historically that was always dropping, but more recently it may be flat for some nodes, increasing temporarily or just not dropping as fast as the historical trend. Some cost estimates for TSMC’S 3nm node: https://wccftech.com/tsmcs-3nm-wafer-prices-will-erode-transistor-density-cost-improvement-worries-morgan-stanley/amp/ https://wccftech.com/tsmcs-3nm-wafer-prices-will-erode-trans...
  - nradov 4y ago
    Yield might actually drop, at least initially. Smaller feature sizes are less tolerant of defects so any tiny flaw can cause a chip to fail testing.
upupandup 4y ago
Samsung went into 3nm production last month and says the new fabrication process is 45 percent more power efficient than its previous 5nm process, has 23 percent higher performance, and 16 percent smaller surface. So extrapolating this we expect a 1nm (if this is even possible) would offer roughly the same amount of gain. Not sure what we can have beyond 1nm

ksec 4y ago

>And what maybe next? N2 in 2025. N1.4 or may be N14A in 2027. Roughly N1 in 2030. I believe we will hit an economic wall by the end of this decade. i.e The cost of Next Gen node exceed what the market are willing to pay for it.

adam_arthur 4y ago

The biggest gains in performance and efficiency almost always come from moving to newer gen manufacturing. So pretty big deal for computing. We may be close to the age where most laptops are fanless, for example. Most non apple devices still on 7-11nm equivalents since apple gets first dibs on new gen fabs from TSMC (pay for the right)

drexlspivey 4y ago
> We may be close to the age where most laptops are fanless, for example. Correct me if I’m wrong but high performance fanless laptops are only possible with ARM chips atm. Has any other big laptop chip designer even announced plans for anything remotely close to M1/M2?
- adam_arthur 4y ago
  Most efficiency gains come from manufacturing fab process, not whether it's ARM or x86. M1 is the only 5nm processor on the market right now. Yes, you will see quite comparable performance once Intel and AMD get to 5nm as well
  - jasonwatkinspdx 4y ago
    Architecture does still matter. M1's decoder is 8 issue. You just can't build that for x86 without pipeline depth or some other resulting tradeoff making it pointless.
rowanG077 4y ago
> So pretty big deal for computing. We may be close to the age where most laptops are fanless, for example. Doubtful since both Intel and Apple are actually INCREASING power requirements over time. Look at Apple M1 vs M2. Intel i7-1185g7 vs i7-1280p.
- adam_arthur 4y ago
  M2 is just an overclocked M1, and thus requires more power as well. Just the same as Intel when they boost clocks for performance The manufacturing process matters far more than whatever tweaks they make intra-generation. M1 is 5nm, Intel is 7-11nm
  - rowanG077 4y ago
    I agree. But my point was that the industry in broad strokes is not moving into the direction of lower power. The opposite in fact. It's been happening for years.
  - GeekyBear 4y ago
    > M2 is just an overclocked M1 That's not what Anandtech found when they tested the performance and efficiency cores used in the A15 and M2. Performance: >In our extensive testing, we’re elated to see that it was actually mostly an efficiency focus this year, with the new performance cores showcasing adequate performance improvements, while at the same time reducing power consumption, as well as significantly improving energy efficiency. Efficiency: >The efficiency cores have also seen massive gains, this time around with Apple mostly investing them back into performance, with the new cores showcasing +23-28% absolute performance improvements, something that isn’t easily identified by popular benchmarking. This large performance increase further helps the SoC improve energy efficiency, and our initial battery life figures of the new 13 series showcase that the chip has a very large part into the vastly longer longevity of the new devices. https://www.anandtech.com/show/16983/the-apple-a15-soc-performance-review-faster-more-efficient/4 https://www.anandtech.com/show/16983/the-apple-a15-soc-perfo...

mccorrinall 4y ago

"N3 technology will offer up to 70% logic density gain, up to 15% speed improvement at the same power and up to 30% power reduction at the same speed as compared with N5 technology (According to TSMCs website). If this holds true we could see 300+ MT/mm2." https://en.wikichip.org/wiki/3_nm_lithography_process#TSMC https://en.wikichip.org/wiki/3_nm_lithography_process#TSMC

konne88 4y ago

I'd be curious to. Wikipedia seems to says that this might be mostly marketing speak. 'The term "3 nanometer" has no relation to any actual physical feature (such as gate length, metal pitch or gate pitch) of the transistors. According to the projections contained in the 2021 update of the International Roadmap for Devices and Systems published by IEEE Standards Association Industry Connection, a 3 nm node is expected to have a contacted gate pitch of 48 nanometers and a tightest metal pitch of 24 nanometers.'

dougmwne 4y ago

I can offer a broad generalization. The new manufacturing process should get us some double digit percentage gains in performance, power consumption or heat. Current Apple product designs are mainly constrained by heat as seen with the recent thermal throttling of the new MacBook Air, so a future M3 processor could be pushed a little harder before it hits its thermal limit. Performance and battery life are already pretty fantastic, so not as much of a practical difference there. The only current products that are really hurting for better chips are high powered wearables like watches, VR headsets or AR glasses. The next few years should see some tangible improvements in those products, but probably not much difference in desktop, laptop or phone. Datacenters, since they run at high utilization rates, will continue to take advantage of the cost savings of slightly more performance per watt and dollar per transistor costs.

gameshot911 4y ago
On the manufacturer side the chips are also smaller, which means more chips per wafer (and thus, presumably, more yield/profit), correct?
- dougmwne 4y ago
  That is offset some by higher defect rates in newer and smaller processes and ever increasing manufacturing costs per wafer. But the metric that matters is cost per transistor. Historically that was always dropping, but more recently it may be flat for some nodes, increasing temporarily or just not dropping as fast as the historical trend. Some cost estimates for TSMC’S 3nm node: https://wccftech.com/tsmcs-3nm-wafer-prices-will-erode-transistor-density-cost-improvement-worries-morgan-stanley/amp/ https://wccftech.com/tsmcs-3nm-wafer-prices-will-erode-trans...
- nradov 4y ago
  Yield might actually drop, at least initially. Smaller feature sizes are less tolerant of defects so any tiny flaw can cause a chip to fail testing.

upupandup 4y ago

Samsung went into 3nm production last month and says the new fabrication process is 45 percent more power efficient than its previous 5nm process, has 23 percent higher performance, and 16 percent smaller surface. So extrapolating this we expect a 1nm (if this is even possible) would offer roughly the same amount of gain. Not sure what we can have beyond 1nm