5 ms·

To those like me wondering what ISA it is, the official documentation says: Runs binaries for x86, Arm, and RISC-V in addition to native ISA I am quite a bit

• ip26 4y ago
  How does it run native binaries from other ISA if ILP is supposed to be handled by the compiler…
  • ncmncm 4y ago
    Looks like ordinary emulation, Qemu.
  • mhh__ 4y ago
    By having it's own compiler in the background. Transmeta did this 20 years ago, sadly the IP is in a bin somewhere inside Intel (?) or some other giant. When we talk about speculation and out of order execution we imagine the CPU is a kind of giant dependency-graph engine but this isn't actually true. The genius of modern hardware design (although kicked off by Tomasulo in the 60s) is that you can "compress" this idea into a real circuit with a finite number of gates and SRAM etc. The quality of the branch prediction lets you get away with a lot on a fairly dumb "throw stuff on a buffer, speculate across memory accesses, pop (commit) off the buffer when the pie's finished cooking" model inside the processor. The draw of this and originally Transmeta is that you have an extremely wide dumb processor in front of a smart software frontend that can do much more complicated work and scheduling based on the all-important runtime information that static VLIW sorely lacked (and thus lead to Intel doing all kinds of stuff with Itanium, hence it ending up EPIC rather than a true VLIW spiritually). Now, software is slow, the way Transmeta got around this is by having a physical cache (the "Tcache") for storing translated instructions in. https://www.cs.cornell.edu/courses/cs6120/2019fa/blog/transmeta/ https://www.cs.cornell.edu/courses/cs6120/2019fa/blog/transm... https://www.realworldtech.com/crusoe-intro/5/ https://www.realworldtech.com/crusoe-intro/5/ Some reverse engineering from the time. Note the amount of nops in the firmware. https://safari.ethz.ch/digitaltechnik/spring2019/lib/exe/fetch.php?media=dehnert_transmeta_code_morphing_software.pdf https://safari.ethz.ch/digitaltechnik/spring2019/lib/exe/fet...
    • erincandescent 4y ago
      NVIDIA Denver was basically the Transmeta design with an ARM instead of x86 frontend. It was very underwhelming.
      • mhh__ 4y ago
        Was Denver VLIW?
        • deleted 4y ago
          [deleted]
        • Symmetry 4y ago
          Yes, mostly. It was essentially a Transmeta Efficeon with some facilities to run ARM code natively the first time through in case it wasn't going to be re-used.
    • my123 4y ago
      > is in a bin somewhere inside Intel NVIDIA. For example, the Carmel core, shipping on Tegra Xavier.
      • mhh__ 4y ago
        Did Nvidia get the rights to CMS? I thought Nvidia got some power management stuff but Intel got the rest of it
        • my123 4y ago
          https://www.techpowerup.com/67814/nvidia-licenses-technologies-from-transmeta-corporation https://www.techpowerup.com/67814/nvidia-licenses-technologi... > The agreement grants to NVIDIA a non-exclusive and fully paid-up license to all of Transmeta's patents and patent applications,
          • Symmetry 4y ago
  • amelius 4y ago
    Perhaps the microcode can be flashed?
    • throw457 4y ago
      Wouldn't really change the physical registers...
      • rbanffy 4y ago
        You can have a large register file and mask the ones that are not architectural into speculative execution flows.
• ThinkBeat 4y ago
  Only x86 not amd64?
• victor82 4y ago
  According to golem.de's report, Prodigy has its own VLIW ISA, and Qemu achieves compatibility with the other mentioned ISAs.