The second paper is more of an existence proof that folks are thinking about the problem. From a high level, register file selection and register renaming is si

The second paper is more of an existence proof that folks are thinking about the problem. From a high level, register file selection and register renaming is similar problem to register allocation in a compiler. The paper itself is dealing with hundreds of virtual registers and how to map them to renamer. TAGE is what I was thinking of [1,2]. Thanks for the reminder. I found some relevant research in neural register allocation, "2020 LLVM in HPC Workshop: Deep Learning-based Approx. Graph-Coloring for Register Allocation" https://www.youtube.com/watch?v=4FW7iznzIoE https://www.youtube.com/watch?v=4FW7iznzIoE There is also some nascent work on applying neural techniques to constraint optimization problems. [1] https://www.semanticscholar.org/paper/A-case-for-(partially)-TAgged-GEometric-history-Seznec-Michaud/a56ecaf2a44259478acf55d1865ed570d80c921b https://www.semanticscholar.org/paper/A-case-for-(partially)... [2] https://www.semanticscholar.org/search?q=TAGE%20branch%20predictor&sort=relevance https://www.semanticscholar.org/search?q=TAGE%20branch%20pre...