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I have super bivalent opinions about Intel. This is the opposite of ambivalent, it means heavily charged in both directions, but cancellation is not allowed.

I have super bivalent opinions about Intel. This is the opposite of ambivalent, it means heavily charged in both directions, but cancellation is not allowed. So that's why they should have let all their chips do ECC instead of making it a premium feature, it would have been better for their brand as "Chipzilla" and had no real cost. And it's dangerous! In fact a soft-error at sea level killed an operating system update on me, lost about tens of thousands of data and money. I have standing to sue Intel, until this sentence clause in which I hereby forfeit the suit, together with requesting them to reconsider ECC (error correction codes) in all their chips as a safeguard needed due to Moore's Law, which was their business plan. Just give it a thought, Intel.

nix23 5y ago
It's your error, having a system with important data no actual/realtime backup no second system and no plan to recover from a failed update and no ecc is YOUR error alone. However, intel should have made ecc the standard and not just for 1000$+ Xeons.
- gjvc 5y ago
  >However, intel should have made ecc the standard and not just for 1000$+ Xeons. Agree 100%. IMHO, the choice between "domestic" and "industrial-strength" should not mean choosing between different degrees of risks of failure.
  - mrlonglong 5y ago
    I gather DDR5 will have ECC as standard du to the extreme density of memory that will bitflip a lot more than usual. Yay fo r consumers.
    - kmeisthax 5y ago
      DDR5 supports on-chip ECC but the extra parity bits we typically associate as "ECC" are still as optional as ever, motherboard manufacturers will still not bother to route those signals anyway, and Intel will still demand you give up overclocking and pay more for Xeon in order to use ECC sticks.
      - daniel-cussen 5y ago
        > you give up overclocking and pay more for Xeon in order to use ECC sticks. That's my point, a virtuous monopoly wouldn't do that. It would allow at least some way to have both. Especially since soft errors are easier with smaller transistors.
      - mrlonglong 5y ago
        I did some reading up on this just now. You are of course right in that ECC on-chip will only handle bitflips inside the chip. To ensure the integrity of signals between the memory and the processor traditional ECC will still be required. On DDR5 it will be necessary to have 4 parity chips whereas with DDR4, you only need 2, so true ECC capable memories will be considerably expensive.
- hedora 5y ago
  It's turtles all the way down, sadly. The bitflip could have hit an OS distribution service. Yes, the target machines should check the checksum, but the distribution service could have flipped the bit before the checksum was computed. But, yeah, ECC should be the standard. Also, Intel should be better about documenting where they've left holes in their online checksums, machine check exception implementations, etc.
  - nix23 5y ago
    >The bitflip could have hit an OS distribution service. No because the updates are signed (integrity).
- ClumsyPilot 5y ago
  "It's your error, having a system with important data no actual/realtime backup" Have you ever taken picture of anything important with your phone, like a crime, or a car accident? Have you ever called 911 or sent money? How dare you use an unreliabke system without ECC, what if a random bitflip would cause it to send 10x more money or data woupd be lost without realtime backup! This disrespect to users and wanky attitude is the cardinal sin of our industry, people's lives are at stake and it's their fault for trusting us.
  - bcrosby95 5y ago
    You're unlikely to notice a single bit flip in a picture you take.
    - nopenopenopeno 5y ago
      unless it gives the killer the same mole that you have on the back of your neck
    - jagger27 5y ago
      I just tested this on a JPEG. Flipping any bit in the first few bytes of a JPEG renders it unopenable on my Fedora system. I get that it's just a header and could probably be fixed, but there are consequences for bitflips, even on images.
      - wyldfire 5y ago
        Consider the likelihood of the bitflip occuring in the critical area you targeted versus any old place in the file. The file is dominated by encoded raster info. Most errors like the bitflips we discuss are not correlated with file locations. They're typically medium errors and the design of typical filesystems will result in something closer to uniform distribution of errors. Bus errors could perhaps be correlated with the start of activity but I think that seems uncommon.
      - jasfi 5y ago
        For compressed images (such as JPEG), if you flip a bit in the image section that breaks the compressed data, and the decompression algorithm won't make sense. However it could also be that there's a checksum on most of the file data. That would explain why you can't open the image at all.
- nyolfen 5y ago
  ryzen pro supports ecc now, fwiw
thaumasiotes 5y ago
> I have super bivalent opinions about Intel. This is the opposite of ambivalent, it means heavily charged in both directions I mean, if you're at the level of manipulating the form of the word, that's already what "ambivalent" means. Strong in both directions. Bi- makes no sense as an opposite of ambi- since ambi- means "both", and bi- means "double". There is no negative element present in either word.
throwawaylinux 5y ago
You bought a non-ECC part from Intel and some memory from a (different) vendor, and the memory flipped a bit. Do you have any evidence or reason to believe that memory error was outside the advertised error rate for the device, or due to some other wrongful conduct by the vendor? And how would you connect that to wrongful action by Intel which contributed to your damages? I'm no lawyer but I suspect your case is not quite the bargaining chip that you seem to believe.
wyldfire 5y ago
> had no real cost. Can you expand on that? Typical coding schemes use redundancy to be able to detect failures. I'm no info theory expert but I presume there's always a cost. And if you can design a smart enough algorithm you can balance the cost with the actual likelihood of failure to find some kind of equilibrium. Of course the algorithm development has its own cost (NRE, time-to-market). It's not clear whether you're talking about modern computers or dawn-of-PCs when you say "should have." It might be smaller cost now but back in the day it would have been mega expensive.

nix23 5y ago

It's your error, having a system with important data no actual/realtime backup no second system and no plan to recover from a failed update and no ecc is YOUR error alone. However, intel should have made ecc the standard and not just for 1000$+ Xeons.

gjvc 5y ago
>However, intel should have made ecc the standard and not just for 1000$+ Xeons. Agree 100%. IMHO, the choice between "domestic" and "industrial-strength" should not mean choosing between different degrees of risks of failure.
- mrlonglong 5y ago
  I gather DDR5 will have ECC as standard du to the extreme density of memory that will bitflip a lot more than usual. Yay fo r consumers.
  - kmeisthax 5y ago
    DDR5 supports on-chip ECC but the extra parity bits we typically associate as "ECC" are still as optional as ever, motherboard manufacturers will still not bother to route those signals anyway, and Intel will still demand you give up overclocking and pay more for Xeon in order to use ECC sticks.
    - daniel-cussen 5y ago
      > you give up overclocking and pay more for Xeon in order to use ECC sticks. That's my point, a virtuous monopoly wouldn't do that. It would allow at least some way to have both. Especially since soft errors are easier with smaller transistors.
    - mrlonglong 5y ago
      I did some reading up on this just now. You are of course right in that ECC on-chip will only handle bitflips inside the chip. To ensure the integrity of signals between the memory and the processor traditional ECC will still be required. On DDR5 it will be necessary to have 4 parity chips whereas with DDR4, you only need 2, so true ECC capable memories will be considerably expensive.
hedora 5y ago
It's turtles all the way down, sadly. The bitflip could have hit an OS distribution service. Yes, the target machines should check the checksum, but the distribution service could have flipped the bit before the checksum was computed. But, yeah, ECC should be the standard. Also, Intel should be better about documenting where they've left holes in their online checksums, machine check exception implementations, etc.
- nix23 5y ago
  >The bitflip could have hit an OS distribution service. No because the updates are signed (integrity).
ClumsyPilot 5y ago
"It's your error, having a system with important data no actual/realtime backup" Have you ever taken picture of anything important with your phone, like a crime, or a car accident? Have you ever called 911 or sent money? How dare you use an unreliabke system without ECC, what if a random bitflip would cause it to send 10x more money or data woupd be lost without realtime backup! This disrespect to users and wanky attitude is the cardinal sin of our industry, people's lives are at stake and it's their fault for trusting us.
- bcrosby95 5y ago
  You're unlikely to notice a single bit flip in a picture you take.
  - nopenopenopeno 5y ago
    unless it gives the killer the same mole that you have on the back of your neck
  - jagger27 5y ago
    I just tested this on a JPEG. Flipping any bit in the first few bytes of a JPEG renders it unopenable on my Fedora system. I get that it's just a header and could probably be fixed, but there are consequences for bitflips, even on images.
    - wyldfire 5y ago
      Consider the likelihood of the bitflip occuring in the critical area you targeted versus any old place in the file. The file is dominated by encoded raster info. Most errors like the bitflips we discuss are not correlated with file locations. They're typically medium errors and the design of typical filesystems will result in something closer to uniform distribution of errors. Bus errors could perhaps be correlated with the start of activity but I think that seems uncommon.
    - jasfi 5y ago
      For compressed images (such as JPEG), if you flip a bit in the image section that breaks the compressed data, and the decompression algorithm won't make sense. However it could also be that there's a checksum on most of the file data. That would explain why you can't open the image at all.
nyolfen 5y ago
ryzen pro supports ecc now, fwiw

thaumasiotes 5y ago

> I have super bivalent opinions about Intel. This is the opposite of ambivalent, it means heavily charged in both directions I mean, if you're at the level of manipulating the form of the word, that's already what "ambivalent" means. Strong in both directions. Bi- makes no sense as an opposite of ambi- since ambi- means "both", and bi- means "double". There is no negative element present in either word.

throwawaylinux 5y ago

You bought a non-ECC part from Intel and some memory from a (different) vendor, and the memory flipped a bit. Do you have any evidence or reason to believe that memory error was outside the advertised error rate for the device, or due to some other wrongful conduct by the vendor? And how would you connect that to wrongful action by Intel which contributed to your damages? I'm no lawyer but I suspect your case is not quite the bargaining chip that you seem to believe.

wyldfire 5y ago

> had no real cost. Can you expand on that? Typical coding schemes use redundancy to be able to detect failures. I'm no info theory expert but I presume there's always a cost. And if you can design a smart enough algorithm you can balance the cost with the actual likelihood of failure to find some kind of equilibrium. Of course the algorithm development has its own cost (NRE, time-to-market). It's not clear whether you're talking about modern computers or dawn-of-PCs when you say "should have." It might be smaller cost now but back in the day it would have been mega expensive.