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> It also means TSMC’s 3 nm process isn’t ready, probably not shipping until late 2022. Apple, by virtue of their tight partnership with TSMC has known about an
by nicoburns 5y ago
> It also means TSMC’s 3 nm process isn’t ready, probably not shipping until late 2022. Apple, by virtue of their tight partnership with TSMC has known about and taken precautions against the 3 nm schedule, hence the initially undisclosed M1 Max UltraFusion design wrinkle, likely an early 2021 decision.
I find it hard to believe that this was a last-minute decision. Rather, I think this pattern of a new core design (using a new process if there is one) releases first for the smallest devices (iPhones), and the gradually moves its way up the lineup all the way up the Ultra before the cycle repeats with a new generation is likely Apple's new strategy going forwards.
My understanding is that this is pretty much what Intel and AMD do too (releasing their smaller dies on new processes first) and that this is a general strategy for dealing with poorer yield number on new process nodes. The idea that Apple would ever have considered releasing their biggest chip as the first chip on a new node seems far-fetched to me.
- dom96 5y agoSide question but I'm curious if anyone knows, where are we heading with this constant decrease in nm for chip manufacturing processes? When will we hit a wall and where will gains in performance come from then?
- monocasa 5y agoLike most curves that looked like exponentials initially, Moore's law turned out to be an s curve. We're already on the top half of that curve where gains are increasingly more difficult and increasingly spread out over time. There's still a more or less direct road map for another five or so full nodes, and we'll probably come up with some cute way to increase density in other ways.
- barbacoa 5y ago>When will we hit a wall and where will gains in performance come from then? nm notation used to mean the width of the smallest feature that could be made. Even today there are processes such as atomic layer deposition (ALD) that allows singular atom thick features. The difference between nodes now are in shrinking macro features, you don't necessarily make them smaller, more important is density. This is currently done with 3d transistors (finfet) and perhaps in the future going full vertical. When all other optimization have been exhausted it's likely to see multiple layers of stacked transistors simulator to what they are doing with NAND memory chips. Eventually even that will hit a wall due to thermal limitations. Beyond that people have proposed using carbonnano tube transistors. That tech is very early but has been proved to function in labs. If we ever figure out how to manufacture carbon nanotubes chips, it will be truly revolutionary; you could expect at least another 50 years of semiconductor innovation.
- sharikous 5y ago> If we ever figure out how to manufacture carbon nanotubes chips That's the problem. We can't. All those technologies are in such a primordial state, if at all, that we don't even know if we will ever be able to use them efficiently 20 years from now.
- whazor 5y agoBesides shrinking and increasing size chips, there is another big problem that might cause us to hit the wall. When the transistor count increases, it also increases the amount of effort. This is a big problem because chips need to be profitable. Although if you just shrink the chips and keep the transistor count the same, then you have a more energy efficient chip. Which is especially useful for portable devices.
- sharikous 5y agoWe have already hit the wall. Decreases have been minimal, and came with a high cost. The numbers you hear about "7 nm", "5 nm", etc.. are just false. They do not represent anything real. The real numbers have been around 20 nm for a decade. They decreased a bit with Intel's competitors achieving better lithography than them before them. And we are in the realm of tons of little tricks that improve density and performance - nothing really dramatic but there are still improvements here and there. The tens of billions of dollars thrown at research achieved them but it is not comparable to the good old days of the '80s, '90s and the '00s
- paulmd 5y agoYes, to emphasize: "nm" marketing is just marketing. There is no dimension on a 5nm chip that is actually 5nm. It used to represent gate length and half-pitch but that stopped being true about 20 years ago and officially became nonsense about 10 years ago, it's "what size planar node do we think these features would perform like" now. Because it's all subjective now, companies went wild with marketing, because consumers know "lower nm => better". But, say, GF 14nm is much more comparable to Intel 22nm, and GF 12nm is still solidly behind late-gen 14++, probably more comparable to TSMC 16nm. Generally Intel has been the most faithful to the "original" ratings, while TSMC has stretched it a little, and GF/IBM and Samsung have been pretty deceptive with their namings. Intel finally threw in the towel a year or so ago and moved to align their names with TSMC, "10nm ESF" is now "Intel 7" (note: no nm) and is roughly comparable with TSMC 7nm (seems like higher clocks at the top/worse efficiency at the bottom but broadly similar), and they will maintain TSMC-comparable node names going forward. Anyway, to answer OP's question directly though, "what comes after 1nm" is angstroms. You'll see node names like *90A or whatever, even though that continues to be completely ridiculous in terms of the actual node measurements.
- corey_moncure 5y ago900 angstroms = 90 nanometers
- akmarinov 5y ago
- querulous 5y agonm is purely a marketing term and has been for 10 years or 25 years depending on what you think it measures future improvement is going to come from the same place it mostly comes from now: better design that unlocks better density and a revolutionary new litho process that as of yet doesn't exist
- jasonwatkinspdx 5y agoNo one has a crystal ball, but here's the industry road map: https://irds.ieee.org/editions/2021 https://irds.ieee.org/editions/2021 (start with executive summary). TL;DR: things get really murky after a notional 2.1nm generation. Past that we'll need a new generation of EUV sources, advancements in materials, etc, that AFAIK are still quite far from certain (but I am not an expert on this stuff by any means). I personally think we're headed to a stall for a while where innovation will focus mostly on larger packaging/aggregation structures. Chiplets and related are definitely here to stay. DRAM is moving in package. Startups are playing around with ideas like wafer scale multiprocessors or ssds. I think clever combinations of engineering at this level will keep us with momentum for a while.
- PaulKeeble 5y agoOddly for GPUs its the other way around and has been for a while. Nvidia and AMD seem to start with the mid and big dies first before filling out the small ones later. Intel seems to be coming from small to big however so they may reverse the trend at least for themselves. But it could still be driven by yield issues where the margins are less good for smaller dies and they sell in much larger volume so things need to be working well to hit the volume of the market and still be highly profitable.
- mschuster91 5y ago> Nvidia and AMD seem to start with the mid and big dies first before filling out the small ones later. For GPUs, yield is less of an issue... the chips are manufactured with the expectation of a number of cores of the many thousand small (in terms of silicon area) ones being defective - overprovisioning, basically. That allows them to simply bin the sliced chips according to how many functional core units the individual chip has. In contrast, even the Threadripper AMD CPUs have only 64 large cores which means the impact of defects is vastly bigger, and overprovisioning is not feasible.
- chickenimprint 5y agoCurrent AMD chiplets come with a maximum of 8 cores.
- Macha 5y agoRight, that's a different strategy again. If you're making a monolithic 64 core die and one of the cores is defective, and the next one down in your product lineup is the 48 core, that's going to make the 64 core model harder to stock (and maybe not worth aiming for at all, if your yields are bad enough that this happens often). Meanwhile if you're making 6 x 8 core chiplets and one of those cores is defective, well that chiplet can go into a 48 core or be a midrange consumer cpu or something, and you'll just pick one of your many many other 8 core chiplets to go with the rest for the 64 core.
- 5y ago
- Forgeties79 5y agoThis article is a little nauseating in its low key drooling over Apple but I think articulates what you’re saying somewhat. Basically build a product around the chip and move it down the product line, double capacity at regular intervals. https://www.theverge.com/22972996/apple-silicon-arm-double-size-mac-m1-pro-max-ultra-a15 https://www.theverge.com/22972996/apple-silicon-arm-double-s...
- gumby 5y ago> This article is a little nauseating in its low key drooling over Apple The author ran Apple Europe and then moved to the US and was an Apple VP for a long time. If anyone is allowed to have this kind of attitude then it's reasonable in Gassée. In people in general, it's...weird.
- Forgeties79 5y agoWasn’t aware of that - thanks for the context!
- acidbaseextract 5y agoGassée also started Be Inc which created BeOS. Beyond being great in and of itself, BeOS was also slated to be the successor to Mac OS 9. If you're an operating system or file system nerd, you will find it very worth looking into BeOS. Gassée overplayed his hand and Apple's acquisition of Be Inc fell through. Apple ultimately went with the NeXT / Steve Jobs combo, quite wisely, but for a long time there was a whole gang of BeOS fanboys lamenting that decision.
- auggierose 5y agoI was thinking the same. Once UltraFusion has been designed, why not use it for 3nm later on as well?
- wlesieutre 5y agoIncidentally, there's a rumor that the iPhone 14 is going to use a new A16 processor in the iPhone Pro, but stick to last year's A15 for the non-pro version. That's a big change from Apple where they've historically put their newest processor in every single phone they launch (even the $430 iPhone SE announced last week has the A15 now). I wonder if it's purely a cost cutting measure, or if they're not expecting good enough yields to supply them for every iPhone, or if they're holding some fab capacity back to have room for the higher end chips alongside the A16.
- nicoburns 5y agoI'd imagine if anything it's a capacity issue now that they're producing mac chips in addition to iPhone chips. I suspect the fact the current chip is already so fast may also be a factor. Pretty much nobody using an iPhone is clamouring for a faster CPU. I have an iPhone 6s, and even the A9 in that is fast enough that my phone never feels slow.
- gumby 5y ago> I have an iPhone 6s, and even the A9 in that is fast enough that my phone never feels slow. Last year I upgraded from a 6s+ to a 12 and I can confirm this the other way around: my old phone did feel slow for a couple of key apps; turns out they are still slow on the new phone. They are just poorly written, and one is basically just a CRUD app with no excuse. So my lesson is to likely keep this phone for a decade. It's not like I couldn't afford to upgrade but why bother?
- lolive 5y agoIsn't the camera better? And also the battery life? [happy owner of a 6s here]
- lynguist 5y agoI found the biggest difference to be the display. I changed from iPhone 7 Plus to iPhone 13 mini. From 7 on the display is wide color and the newer phones are all OLED with true blacks. They’re impressive. Another big difference is 5G. I can easily get 500+ MBit/s downstream while outside.
- paulmd 5y agoIt absolutely was not. The A15/"M2" architecture isn't even going to be on 3nm, it will be N5P, so only a "plus" of the current node. There was absolutely no scenario where Apple was on 3nm this year. Incidentally this means that Apple will no longer have a node advantage once Zen4 launches - both Zen4 and A15 will be on the same node, so we can make direct comparisons without people insisting that Apple's performance is solely due to node advantage/etc. But yeah, that does go to show that 3nm is slow to launch in general - Apple would not willingly give up their node lead like this if there were anything ready for an upgrade. I don't think it's actually falling behind in the sense that it was delayed, but it seems even TSMC is feeling the heat and slowing down their node cadence a bit. Also, as far as this: > Second, the recourse to two M1 Max chips fused into a M1 Ultra means TSMC’s 5 nm process has reached its upper limit. There is still Mac Pro to come, and presumably Apple would want an actual Pro product to offer something over the Studio besides expansion. marcan42 thinks it's not likely that quad-die Mac Pros are coming based on the internal architecture (there's only IRQ facilities for connecting 2 dies) but that still doesn't rule out the possibility of a larger die that is then connected in pairs. Also bigger/better 5nm stuff will almost certainly be coming with A15 on N5P later this year, so this isn't even "the best TSMC 5nm has to offer" in that light either.
- caycep 5y agoWhat would be interesting in the far future is if, say, Zen 4 (or 5+) and M2(+) claims some of Intel's new foundry capacity...the comparisons would be very interesting...
- marcan_42 5y ago> quad-die Mac Pros I said quad-Jade Mac anythings aren't coming because that die is only designed to go in pairs (that's the M1 Max die). Everyone keeps rambling on about that idea because that Bloomberg reporter said it was coming and got it wrong. It won't happen. Apple certainly can and probably will do quad dies at some point, it'll just be with a new die. The IRQ controller in Jade is only synthesized for two dies, but the architecture scales up to 8 with existing drivers (in our Linux driver too). I fully expect them to be planning a crazier design to use for Mac Pros.
- 5y ago
- GeekyBear 5y agoIt looks like Qualcomm is bailing out of Samsung's leading edge node, so competition for TSMC's leading edge node is higher than ever with Intel, Apple and Qualcomm all in the running. >Qualcomm has decided to switch back to TSMC for the Snapdragon 8 Gen2 Mobile Platform. Samsung’s 4nm process node is plagued by a yield rate of as low as 35 percent. https://www.techspot.com/news/93520-low-yield-samsung-4nm-process-node-prompts-qualcomm.html https://www.techspot.com/news/93520-low-yield-samsung-4nm-pr...