3 ms·
Sounds like a barrel processor [1], used to hide latency of individual instructions to allow code to be written without having to think as much about instructio
by addaon 5y ago
Sounds like a barrel processor [1], used to hide latency of individual instructions to allow code to be written without having to think as much about instruction scheduling / dependencies.
[1] https://en.wikipedia.org/wiki/Barrel_processor https://en.wikipedia.org/wiki/Barrel_processor
- sitkack 5y agoThe Xmos chips give the programmer virtual time sliced contexts over one or more hardware core(s). Say you have a 400 Mhz base clock and 4 threads, each one would see the wall clock time advance at 100 Mhz. This is useful for having concurrent realtime operations on each hardware thread w/o having to resort to trickery. These chips are ideal for DSP, phased arrays and beam forming. Most of their devkits are centered around voice applications. https://www.xmos.ai/documentation/XM-014363-PC-5/html/arch-hw-guide/index.html https://www.xmos.ai/documentation/XM-014363-PC-5/html/arch-h... https://www.xmos.ai/download/xCORE-Array-Microphone-Product-Brief(1.1).pdf https://www.xmos.ai/download/xCORE-Array-Microphone-Product-...