3 ms·

But it does. x86 is hell to decode in parallel, because it's variable length (and in a complex way), so Intel can't build CPUs that keep a wide pipeline fed wit

But it does. x86 is hell to decode in parallel, because it's variable length (and in a complex way), so Intel can't build CPUs that keep a wide pipeline fed with instructions efficiently like Apple can, with the 8-wide decoder in the M1. That's one of the things that makes the M1 special, and how it gets away with lower clocks and power consumption than competing x86 designs.

jabl 5y ago
Current x86 as well as many Arm cores have micro-op caches, so they don't need as wide decoders as a design that doesn't have such a thing, like M1. (That doesn't take away from the fact that M1 is a very impressive design, of course)
userbinator 5y ago
Variable length doesn't matter that much, you just have something that has a wide shifter on the front. And instruction density is important because it saves cache. A single x86 instruction can take the place of several RISC ones, which is why they needed to have it decode so wide. The M1 is almost entirely a process advantage.
- marcan_42 5y ago
  It's not about a shifter, it's about determining instruction boundaries. With variable-length instructions the next instruction start depends on the previous one, making it an inherently serial process. Working around that to decode in parallel is not easy and gets superlinearly more complex the wider you make the decoder. A fixed instruction size architecture like ARM64 doesn't have to deal with any of that.
  - userbinator 5y ago
    A fixed instruction size architecture like ARM64 doesn't have to deal with any of that. What it does have to deal with is needing several times higher fetch bandwidth. It's all a bunch of tradeoffs. Related article: https://chipsandcheese.com/2021/07/13/arm-or-x86-isa-doesnt-matter/ https://chipsandcheese.com/2021/07/13/arm-or-x86-isa-doesnt-...
    - Dylan16807 5y ago
      > It's all a bunch of tradeoffs. Fixed vs. variable is a bunch of powerful tradeoffs. The way x86 can stack a bunch of prefixes on an instruction is pretty bad though. You have to interpret many pieces of an instruction to find the size.

jabl 5y ago

Current x86 as well as many Arm cores have micro-op caches, so they don't need as wide decoders as a design that doesn't have such a thing, like M1. (That doesn't take away from the fact that M1 is a very impressive design, of course)

userbinator 5y ago

Variable length doesn't matter that much, you just have something that has a wide shifter on the front. And instruction density is important because it saves cache. A single x86 instruction can take the place of several RISC ones, which is why they needed to have it decode so wide. The M1 is almost entirely a process advantage.

marcan_42 5y ago
It's not about a shifter, it's about determining instruction boundaries. With variable-length instructions the next instruction start depends on the previous one, making it an inherently serial process. Working around that to decode in parallel is not easy and gets superlinearly more complex the wider you make the decoder. A fixed instruction size architecture like ARM64 doesn't have to deal with any of that.
- userbinator 5y ago
  A fixed instruction size architecture like ARM64 doesn't have to deal with any of that. What it does have to deal with is needing several times higher fetch bandwidth. It's all a bunch of tradeoffs. Related article: https://chipsandcheese.com/2021/07/13/arm-or-x86-isa-doesnt-matter/ https://chipsandcheese.com/2021/07/13/arm-or-x86-isa-doesnt-...
  - Dylan16807 5y ago
    > It's all a bunch of tradeoffs. Fixed vs. variable is a bunch of powerful tradeoffs. The way x86 can stack a bunch of prefixes on an instruction is pretty bad though. You have to interpret many pieces of an instruction to find the size.