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Intel completely disables AVX-512 on Alder Lake after all
- xlazom00 5y agoAny idea how big area from CPU silicon AVX-512 really is? If it share some parts with AVX-2 or not
- bee_rider 5y agoThe article as some bits of the chip marked off (with big red X's). They look reasonably sized to be the AVX-512 parts, in the sense that they are quite large but not the majority of the chip or anything.
- deleted 5y ago[deleted]
- GeekyBear 5y agoOnce power and heat in a chip go high enough, Electromigration causes reliability issues. It was already thought that this would become a problem to worry about at smaller process nodes, but does AVX-512 on Alder Lake push voltage and heat enough that it is an issue already? >Electromigration is the movement of atoms based on the flow of current through a material. If the current density is high enough, the heat dissipated within the material will repeatedly break atoms from the structure and move them. This will create both ‘vacancies’ and ‘deposits’. The vacancies can grow and eventually break circuit connections resulting in open-circuits, while the deposits can grow and eventually close circuit connections resulting in short-circuit. https://www.synopsys.com/glossary/what-is-electromigration.html https://www.synopsys.com/glossary/what-is-electromigration.h... >Aging Problems At 5nm And Below https://semiengineering.com/aging-problems-at-5nm-and-below/ https://semiengineering.com/aging-problems-at-5nm-and-below/
- nottorp 5y agoIntel has always been doing artificial market segmentation. I would only be surprised if they somehow release a cpu generation with the same features across all models...
- blackoil 5y agoFunny how many times on this site I read about futility of AVX-512. But now that a hack enabling it is fixed, suddenly everyone needs it.
- ComputerGuru 5y agoThe AVX-512 rollout has been a complete disaster. Look at how quickly AVX-2 became widespread and targetable. My all metrics, AVX-512 adoption has been abysmal and most of the blame lies squarely on Intel's shoulders. And even now that platforms are beginning to support it, developers just aren't interested because AVX-2 + optimizations got them most of the way there. Then there's the heavy performance hit that regular code intermixed with AVX-512 incurs.
- mhh__ 5y agoThat performance hit doesn't necessarily exist on a given workload, because the hysteria over downclocking was mainly with the very early desktop implementations of AVX-512. You'd have to measure it and see nowadays (and consider that the downclocking may be simply due to yourself actually using all the execution units at once)
- ComputerGuru 5y agoWhether the hit is there or not is besides the point so long as it's perceived to be there by a not insignificant portion of the developers that might otherwise chase after an AVX-512 implementation. (Citation needed for my initial claim that the perception of the performance hit exists within that population.)
- wellthisisgreat 5y agois z690 platform worth upgrading to from z590 11700k -> 12700k?
- fomine3 5y agoIntel never sold Alder Lake with AVX512 support but only underlying P-core technically supported. They failed to completely disable it. I believe they don't validated AVX512 functionality because anyway they don't support. It's not fair to blame disabling.
- soheil 5y ago"I hope AVX512 dies a painful death, and that Intel starts fixing real problems instead of trying to create magic instructions to then create benchmarks that they can look good on… I absolutely destest FP benchmarks, and I realize other people care deeply. I just think AVX512 is exactly the wrong thing to do. It’s a pet peeve of mine. It’s a prime example of something Intel has done wrong, partly by just increasing the fragmentation of the market." Linus T
- jiggawatts 5y agoLinus Torvald's opinion of AVX512 just doesn't matter. It's like asking a 3D game programmer their opinion about FPGAs.
- ChuckMcM 5y agoThis sort of thing is always a bad look for Intel, die costs are relatively fixed and "upselling" some of the transistors on the die for increased margins will always fail against a competitor who is willing to enable all the things (and AMD certainly seems to be in that camp). What it means is that AMD has an "easy" market strategy for continuing to beat Intel, just out feature them at a lower margin, turn Intel's fab capacity into an anchor rather than an asset.
- lincpa 5y ago
- Flameancer 5y agoExcuse my ignorance but what is AVX-512 even supposed to improve? I’ve been hearing about this instruction set since around 2015 and I have yet to hear or see any significant use case for these instructions.
- Terry_Roll 5y agoSome crypto miners use it instead of dedicated Asics, its intense cpu processing but at the expense of everything else running through the cpu, its a cludge but Intel have said they are looking at dedicated crypto mining cpu's to maybe get in on the inflated GPU price tags people currently see. I read somewhere Nvidia have even added some features which prevents their GPU's from being used for mining. AVX-512 is possibly a go-to place for stealth crypto mining for some hackers in server farms.
- christkv 5y agoIs this not the definition of bait and switch? How can this not end up in a lawsuit and investigation from regulatory bodies ?
- MauranKilom 5y agoThis is an undocumented feature, from what I gather. So it's missing the "bait" part of "bait and switch".
- alophawen 5y agoThe performance benchmarks of the Alder Lake is far from undocumented at this point.
- detaro 5y agoYou had to explicitly turn it on through hacks in the BIOS some motherboard makers added. If people enable a feature that's explicitly not supported on their benchmark rigs without disclosing it, that's not the vendors fault.
- jsnell 5y agoIt's not even undocumented, but explicitly a documented as a feature those CPUs don't have. Originally it was supposed to be fused off physically, I wonder why it wasn't.
- davidlt 5y agoIt could be that decision to not support AVX512 was made very late in product development and thus early batches didn't have chicken bit disabled or/and fused it off. There might be gazillions of reason why this was done.
- sodality2 5y agoTo get the positive wave of initial reviews from people who enable it.
- sebow 5y agoUnsurprising given their history regarding such moves.Kind of sad, some people in the linux community knew about the fact that alder lake is avx-512 capable.Also even if they did not advertise the product with this feature, can't they still be sued for worsening a product post-purchase? Intel/AMD(though i can't remember AMD doing this in the last 5+ years) forcing motherboard vendors to effectively brick and disable features from consumers sounds like shouldn't be possible. You don't buy the CPU as a subscription to compute, you buy it as a product.
- SkeuomorphicBee 5y agoStuff like this is why I plan to never buy Intel ever again. I always disliked Intel's strategy for market segmentation by disabling specific instructions, I much prefer AMD's strategy of segmenting just by speed and number of cores. It is really annoying that with Intel you can't run the same program on the server and on your desktop, it makes development and testing a huge pain.
- PragmaticPulp 5y ago> I always disliked Intel's strategy for market segmentation by disabling specific instructions, The efficiency cores don’t have AVX-512 because they’re low power, simplified cores. This mod required disabling the efficiency cores, reducing core count anyway. It wasn’t actually a free upgrade. > I much prefer AMD's strategy of segmenting just by speed and number of cores I’ve been using ECC RAM with AMD consumer parts, but it’s not all smooth sailing. The ECC support in their consumer parts isn’t officially supported, so it has been extremely difficult to determine if it’s even working at all. There are long forum threads where many people have tried to confirm it with mixed results. AMD may unofficially leave these features in place, but it turns out unofficial support isn’t all that straightforward.
- marcan_42 5y agoIt's not "unofficial" support, it's just the motherboards/OEMs don't bother to implement it or implement it in an opaque way. All the motherboards have to do to support this properly is have the extra RAM traces and an easy setup menu info line that tells you whether ECC is on or not. The CPU supports it fine. If you run Linux, you can use dmidecode and the EDAC driver to confirm if you have ECC enabled.
- wmf 5y agoJust don't investigate AM4 motherboard compatibility and AGESA revisions... Absolutely no artificial segmentation here, no sir.
- ineedasername 5y agoDidn't AMD disable cores on chips that were enabled and the exact same chips branded higher end? [0] I know the explanation in some cases were that they didn't pass QC, but I also never came across stories of widespread problems when these cores were reenabled by end users. If Intel is playing games here, I'm not sure they're unique to Intel. [0] https://www.techradar.com/news/computing-components/processors/how-to-unlock-the-phenom-s-fourth-core-618501 https://www.techradar.com/news/computing-components/processo... [1] partial list of prior unlockable AMD chips: https://docs.google.com/spreadsheets/d/19Ms49ip5PBB7nYnf5urxsySvH-Sdy6liE2EBDaB8b54/htmlview https://docs.google.com/spreadsheets/d/19Ms49ip5PBB7nYnf5urx...
- codeflo 5y agoIf all of this was planned (and I’m not saying it is), that would have been very clever. It would work like this: 1. You “accidentally forget” to disable the feature in hardware. Given how competitive the market is, motherboard manufacturers can be relied upon to enable it in their “1337 OVERCLOCKZ” mode. No conspiracy is needed. 2. You “tolerate” this practice just long enough to win the critical initial wave of reviews and benchmarks. Interested buyers will look at those charts for years to come. 3. And when you finally do turn the feature off to protect the market for your server chips, you can plausibly claim that you had explicitly forbidden using this configuration from the very beginning. None of this is your fault. . Edit/Addendum: Just to clarify my actual opinion, of course an honest mistake is more likely, at least for step 1. Very few “evil schemes” exist in reality because people aren’t all that clever (and all that evil). But the possibility is interesting to speculate on.
- Kletiomdm 5y agoI don't think that anyone who cares about specific CPU features would not know that it shouldn't work and therefore wouldn't risk getting it removed later Everyone else would not know that this might have a performance impact.
- phkahler 5y ago>> Very few “evil schemes” exist in reality because people aren’t all that clever True, but those that try actual evil schemes must be watched for repeats. Remember Intel and Rambus?
- formerly_proven 5y agoI've voiced this before but I think AVX-512 is completely irrelevant in the consumer space (which imho makes titles like "Intel artificially slows 12th gen down" incredulous). Even for commercial applications - sure there are some things that benefit from it. On the other hand, I work in HPC and even in (commercial, not nuke simulations or whatever the nuke powers do with their supercomputers) HPC applications AVX-512 is rarely used. Also... AVX-512 was never announced for 12th gen. No one claimed it was there, would work, would be stable or anything to that tune. No one should have had an expectation that a 12th gen CPU would do AVX-512 (and no one did). Intel even explicitly said pre-launch that it won't do AVX-512. Some people found post-launch that some BIOSes allow you to turn the E-cores off and that causes AVX-512 to be detected. IIRC not even the BIOS option claimed anything about AVX-512. There are a lot one can criticize about Intel. Many low hanging fruits. This isn't one of them.
- tgsovlerkhgsel 5y agoHow much controls do users have over microcode updates? In other words, how hard is it to avoid or roll back an user-hostile update like this?
- qayxc 5y agoDepending on the OS, microcode updates are under full user control. You can apply them or don't at your own discretion. The problem is knowing which particular update includes the change.
- marcan_42 5y agoYou can only upgrade microcode on any given boot, not downgrade it. Therefore, if the BIOS has already upgraded your microcode for you on boot, you can't undo that from the OS.
- qayxc 5y agoI misread that there, so disregard the first reply. Point still stands: no one forces you to upgrade your BIOS (unless there's problems) and even then, patching the BIOS upgrade itself is still an option. So it remains under user control.
- qayxc 5y agoThe BIOS doesn't upgrade microcode - the OS does. During boot there's usually no network connectivity, so how would the BIOS even know of an update, let alone acquire it?
- tomxor 5y agoThey both have the opportunity to upgrade it. The BIOS holds a copy of the microcode and this can be upgraded by upgrading the BIOS/EFI (bundled with BIOS updates). The same for the OS. On boot the BIOS loads it's update first, then the OS, provided each is newer than the currently loaded microcode. So the idea is that if you don't like this update, you need to prevent your BIOS from updating (or downgrade it), and then also configure Linux to ether not upload it's microcode, or load a specific one.
- sesuximo 5y agoReally missed an opportunity to give something to people for free
- PragmaticPulp 5y agoNo, the AVX-512 instructions weren’t free. You had to disable all of the E cores. It only made sense if you could afford to give up the extra cores to accelerate a few instructions in a smaller number of threads. It wasn’t a net win for the average person. I doubt many people would ever do this.
- pantalaimon 5y agoSo why not leave that option for people who want to write and test AVX512 code? It's almost like Intel doesn't want people to use that feature
- oofabz 5y agoE cores are only present on the high-end Alder Lake SKUs. If you have a mid-range chip with only P cores like the i5-12400, enabling AVX-512 really is free. Such P-core-only chips are attractive to Linux users. Intel Thread Director, their Alder Lake schedule software, does not work as well on Linux as it does on Windows. It has a tendency to schedule processes on the E cores even when P cores are available, which is bad for performance. There is significant overlap between users interested in AVX-512 and users interested in Linux performance, making the mid-range Alder Lake chips especially appealing to this group. Unfortunately they top out at 6 cores with no ECC, so it's not a perfect match.
- jacquesm 5y agoOr to get some good PR, which they are in real need of.
- pantalaimon 5y agoSince Linux loads the microcode on it's own, can this be used to apply an old microcode or is there a prevention against downgrading the version?
- marcan_42 5y agoI'm pretty sure downgrades are blocked. You need to hack the BIOS so the (volatile) upgrade never happens on boot.
- timpattinson 5y agoI think for the subset of people that care about having AVX512 on their 12900K, and bother to disable the E-cores to achieve it, they will be using enthusiast motherboards that don't block bios upgrades in this way.
- marcan_42 5y agoMicrocode downgrades are blocked by the CPU itself; the BIOS doesn't get a say. You could downgrade the whole BIOS to stop the upgrade being applied on boot (maybe, some motherboards may try to block this too), but then you need to choose between uncrippled microcode and BIOS bugfixes and improvements.
- nullify88 5y agoI wouldnt call it hacking. If you can find or backup the bios image for your motherboard, you can replace the microcode in it and reflash. Bios images are modular and the microcode is a replacable component.
- marcan_42 5y agoHacking BIOS images isn't always that easy. Often they are signed (EFI Capsules) and the standard update utility in the BIOS menu will reject modified versions. I had to use a convoluted flashing process to make a trivial patch to a BIOS a few years back for this reason.
- qayxc 5y agoMuch ado about nothing, IMHO. AVX-512 isn't advertised by Intel as a 12th gen desktop CPU feature and doesn't provide any advantages for most desktop users anyway. Sure, there's niche applications like some particular PS3 emulator, but I don't share the author's opinion w.r.t. to performance and efficiency in desktop use.
- nullifidian 5y agoIt doesn't provide any advantages because there is no install base, so desktop software doesn't utilize it. It's just a wider SIMD instruction set, and I'm confused why people relegate it to HPC only category.
- CodesInChaos 5y agoAFAIK it downclocks the CPU, even if the AVX512 instructions are only a tiny fraction of instructions. So you only benefit from AVX512 if you use it enough. While 128 bit SIMD give you a speedup if you use it for a few functions that need it, without slowing down the rest of your code or even unrelated applications.
- nullifidian 5y agoIn heavily vectorized applications you still get a sizable speed up over AVX2, e.g. in tasks like video encoding. In mixed/real-time applications this issue could be solved by dedicating/pinning a thread with the AVX-512 payload to a core, automatically or manually. Not sure if such policies have been implemented in practice.
- dragontamer 5y agoThere's significant downclocking only on on Skylake-X (aka: 1st generation teething problems). On more recent cores, there's only ~100 MHz of downclocking, which is so small you can pretty much ignore it.
- jeffbee 5y ago
- NavinF 5y agoI’m not surprised. A lot of people were burned last year when their entire CPU downclocked as soon as one application started using AVX-512. That killed all interest even before Alder Lake. Also see Linus’s rants in this thread: https://www.realworldtech.com/forum/?threadid=193189&curpostid=193190 https://www.realworldtech.com/forum/?threadid=193189&curpost... And the discussion: https://news.ycombinator.com/item?id=23809335 https://news.ycombinator.com/item?id=23809335 Today only benchmarks and HPC workloads use AVX-512. I’m sure Intel is happy to force HPC customers to pony up for data center CPUs.
- mhh__ 5y agoTechnically Intel actually did the things Linus asked for and did AVX-512 as well (on the server at least): The Golden Cove cores are extremely wide and brought a big single thread performance boost.
- qayxc 5y ago> Today, only benchmarks and HPC workloads make use of it. From what I've heard, there's also a PS3 emulator that benefits greatly from it and its users are quite annoyed by this [0]. According to the sources, users would need to disable E-cores and preferably HT as well to get the best results, though. Pretty niche and not helpful in general (since disabling up to 50% of the cores/threads doesn't seem great for other use cases, but hey - 10% more performance in PS3 emulation). [0] https://www.tomshardware.com/news/ps3-emulation-i9-12900k-vs-i9-11900k https://www.tomshardware.com/news/ps3-emulation-i9-12900k-vs...
- jepler 5y ago> According to the sources, users would need to disable E-cores I don't know the specificis of these CPUs, but it seems likely that _a sane design_ could allow heterogeneous CPU features within a single machine. For example, let's assume two CPU feature sets, E and P. E is a proper subset of P. Further, an E core will issue an "illegal instruction" exception when it encounters an instruction that is undefined on E and _may be_ defined on P. Now the OS becomes free to do what it needs to do: Run a program on whatever core, E or P; but if it gets an "illegal instruction" on an E core, check the instruction; if it would be valid on the P core, mark the program (or thread or whatever) as runnable on P-cores only. It wouldn't all work optimally on day one, but it's hardly clear that it's impossible to make it workable. There are other 'niceties' you'd want, such as the ability for applications to query the 'biggest set' and 'smallest set' of CPU feature flags. Would it be worth the work? I'd have to classify that an open question.
- _xnmw 5y agoBetween shenanigans like this and Spectre/Meltdown mitigations giving me a ~20% performance hit [1], I avoid Intel like the plague if I have the choice. [1] https://arxiv.org/pdf/1807.08703.pdf https://arxiv.org/pdf/1807.08703.pdf
- mhh__ 5y agoPretty crap reasoning then. Intel never ever marketed these as having AVX-512 and unless you are running a Xeon from 2012 like the paper you've linked a modern CPU (note, any desktop class CPU) will only be vulnerable to some bits of Spectre and not meltdow
- xondono 5y agoMy 7700K (2017) got a similar downgrade in performance from the mitigations. Switched to AMD for the first time in my life, no regrets so far.
- mhh__ 5y agoMeltdown hadn't been (publicly) found until 2018 so the same applies. Intel's current offerings are extremely competitive with AMD on many workloads.
- pantalaimon 5y agomitigations=off is IMHO a save thing to do on a single user desktop unless you have nation state level adversaries
- xondono 5y agoI did not expect the “I don’t have anything important enough” excuse on HN. You do not need to be a nation state to fall victim to sophisticated attacks. Most attacks nowadays are performed by bots indiscriminately blasting exploits to anything they can reach. Even if state actors were the only ones capable of exploiting Spectre/Meltdown, you could still end up being collateral damage. Infecting employees at their home computers and then spreading via USB/shared files to work computers is nothing new either.
- causi 5y agoAnd here I thought it might've been Intel's way of apologizing after robbing us of performance with the Spectre and Meltdown debacles.
- Brave-Steak 5y ago
- alkonaut 5y agoDo both E and P cores handle avx instructions or are some instructions specific to p-cores? In that case, how does a processor with heterogeneous cores deal with processes (or, how does the OS/driver do it in automatic mode when affinity isn’t guided)?
- avx512 5y agoThe elephant in the room is the classic CPU architecture mistake where you use two different instruction sets on your performance and efficiency cores. There is no way to prevent code with AVX-512 instructions from being executed on an unsupported core. This exact same problem that plagued early ARM big.LITTLE designs that used ARMv8.2 on the performance core but ARM8.0 on the efficiency core, forcing all code to use the more restrictive instruction set and cripple the performance benefits of the “big” cores.
- Iwan-Zotow 5y agoYeah, it killed heterogenic MPI clusters before as well
- BeeOnRope 5y agoThe E and P cores support the same instruction sets (apart from this thing where you could run AVX-512 on the P cores if you disabled the E cores, which is going away).
- PragmaticPulp 5y agoNope! You have to disable the efficiency cores to enable AVX-512. Between that and the relative scarcity of AVX-512 code, this isn’t really a big loss. It wasn’t like it was a free feature.