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The AMD “Aldebaran” GPU that won exascale
- genpfault 5y ago> If you want to know how and why AMD motors have been chosen for so many of the pre-exascale and exascale HPC and AI systems... AMD...motors?
- dragontamer 5y agohttps://www.amd.com/system/files/documents/amd-cdna2-white-paper.pdf https://www.amd.com/system/files/documents/amd-cdna2-white-p... The article points out this CDNA2 whitepaper, which has the juicy technical details. CDNA1 is here: https://www.amd.com/system/files/documents/amd-cdna-whitepaper.pdf https://www.amd.com/system/files/documents/amd-cdna-whitepap... ----- CDNA2 / MI200 is a chiplet strategy with two "GCDs", each functioning as a classic GPU. These two GCDs can access each other's memory, but only at a lower 400GBps speed (page 8 whitepaper). The actual HBM RAM is designed for 1600 GBps (article), x2 since two GCDs exist. AMD says its like 3200 GBps but in actuality, any one such block/workgroup can only get 2000 GBps (1600 GBps local RAM + 400 GBps from infinity-fabric / partner GCD). So its really a bit complicated and will likely be very workload specific. If your data can be cloned / split efficiently, then the RAM probably will look like 3200GBps. But if you have to communicate with both parts of RAM to see all the data, you'll see a clear slowdown.
- rektide 5y agoI've been playing a little of the small-arena-survival game Warhammer40k: Dawn of War 2 (2009), and when starting, the AMD "The Future is Fusion" logo shows full screen. For the longest time this was kind of a sad memento to something lost, a future that never happened: Fusion was a ~2009 campaign for their APUs, their GPU+CPU chips, and other possible shared-memory systems. Well, it's happening. Sort of. AMD is finally getting into the post PCIe game for reals this time. Only at the very high end of the market though. (Perhaps upcoming consumer GPUs might have such capabilities, but AMD seems to be only shipping literally dozens/hundreds of high end GPUs a month atm.) Fusion is happening... for the very big. Oh, and also, Apple, whose 200 / 400GBps M1 Pro/MAX chips are performing true wonders via fused/unified memory. The Steam Deck, with ~66GBps and integrated AMD APU/GPU, will be a next test. I'm not sure how consoles are doing these days, which is another strongly AMD corner. In some ways, the Infinity Fabric 3 news makes me a bit sad. In it's past life, Infinity Fabric was known as HyperTransport (HTX), an open standard, backed by a HyperTransport Consortium, with roots supposedly going all the way back to DEC & Jim Keller (who Apple got some experience from too via the 2007 PA Semi acquisition) & other engineers seemingly. FPGAs, network cards, storage could all work closely with the CPU via HTX. In this new regime, Infinity Fabric is finally catching up with the also closed/proprietary capability of Nvidia gpus plus CPUs as well (only available on NV+Power architecture computers AFAIK). But outside players aren't really able to experiment with these new faster closer-to-memory architectures, unlike with HTX. For that, folks need to use some of the various other more-open fabric/interconnects, which are often lower latency than PCIe but usually not faster: CXL, OpenCAPI, Gen-Z, and others.
- dragontamer 5y agoOAM is an open standard that Intel + AMD seem to be supporting though. And with AMD now the owner of Xilinx, there's a good chance that this technology will be across Xilinx FPGAs + AMD GPUs + AMD CPUs.
- fxtentacle 5y agoI would sincerely hope for a competitive AMD GPU for deep learning. But as long as it's a week-long journey with unknown ending to try to recompile TensorFlow to support ROCm, everyone I know in AI will firmly stick with NVIDIA and their production-proven drivers and CUDA APIs. I wish AMD would offer something like NVIDIA's Inception program to gift some accelerators and GPUs to suitable C++ coders (like me) so that there's at least a few tutorials on the internet on how other people managed to successfully use AMD + ROCm for deep learning. EDIT: And it seems ROCm doesn't even support any of those new RDNA2 accelerators or gaming GPUs: https://github.com/RadeonOpenCompute/ROCm/issues/1344 https://github.com/RadeonOpenCompute/ROCm/issues/1344 So this is great hardware, but absolutely useless unless you are big enough to write your own GPU drivers from scratch ~_~
- loosescrews 5y agohttps://github.com/RadeonOpenCompute/ROCm/issues/1617 https://github.com/RadeonOpenCompute/ROCm/issues/1617 appears to be the issue to track if you are interested in ROCm support for RDNA2.
- my123 5y agoROCm 4.5 is also the last release to support their own Vega 10 based accelerator. (Radeon Instinct MI25) https://github.com/RadeonOpenCompute/ROCm#amd-instinct-mi25-end-of-life https://github.com/RadeonOpenCompute/ROCm#amd-instinct-mi25-... aka AMD doesn't care... they just want the supercomputer contracts where the customers are savvy enough to build their own very specific SW stack.
- bradknowles 5y agoI have friends here in the Austin area who have worked for AMD. From what I’ve heard from them, it’s not that AMD doesn’t care, it’s that AMD is clueless and hopelessly disorganized, and they’re constantly doing whatever they can to chase the latest supercomputing contract, to the exclusion of all else. It’s a target-rich environment if you want to learn all the bad anti-patterns, so that you can avoid doing them in the rest of your career. So, it’s not that they don’t care. It’s that they don’t have enough hours in the every-day-is-a-hair-on-fire-day that they would be capable of caring.
- ggm 5y agoIf AMD wanted to sell more in this space, wouldn't it pay to support the code which runs in this space? Intel and nvidia are masters of funding compiler and tool chain and even applications stacks to work on their dice. Reading this article and here, I get the impression AMD hasn't entirely mastered how you need to sell the gateway drugs as well as the hard stuff, to sell more of the hard stuff in the end.
- dragontamer 5y agoAMD was a much smaller company than Intel / NVidia just a few years ago. Even today, their market cap is a bit misleading, because AMD has much lower profits / revenue than either company. It only makes sense for AMD to work with HPE / Cray instead for these details for now. ROCm / HIP seems like the path AMD is taking moving forward. But without Windows support and with few GPUs supporting HIP, its a bit of a hard sell. That being said: Polaris 580X was good for a while (until ROCm 3.x or so). Vega64 was good through ROCm 4.5. And now Blender is saying RDNA2 is supported. So it seems like AMD is keeping at least some consumer GPUs available to try out HIP. You've gotta be careful, its not like NVidia where PTX cross-compiles the CUDA into all different architectures. Only specific cards seem to have good results (such as Vega64 or Rx 580. But the RX 550 had issues) ------- Just 7 years ago in 2014, AMD was laying off entire teams as it was risking bankruptcy. The loss of good engineers like that has reverberating effects on the company. They're beginning to recover now (ROCm development really kicked into high gear this past year), but a lot of their earlier stuff (HSA, Fusion, Bobcat cores, etc. etc.) were curtailed in the fight for survival.
- ggm 5y agoIntel had similar scaling/layoff issues. Wasn't there a story in 2018/19 timeframe about Intel having to re-hire shedloads of greybeards because of their production issues?
- dragontamer 5y agoAMD cut back to survive. There were bankruptcy concerns in 2014. Intel cut back for no reason. So it was more of a strategic mistake. Intel was making so much money with Sandy Lake (and other i7 processors: 2nd generation through 6th generation were a one-sided domination of the market).
- phkahler 5y agoAround 1980 my family got their first computer. I've followed this business ever since, and I was amazed that a CRAY could do MFLOPS. My MS basic interpreter could do hundreds or even thousands of FLOPs on its 8080A. I watched as the high end went to hundreds of MFLOPS, then GIGAFLOPS which seemed insane. There were national efforts to reach TFLOPS, and reading about the challenges (IIRC at the time interconnect was a huge deal) made it seem like the end was near. Moore's law was always in danger. Then came PETAFLOPS consuming megawatts of power. And now I play VR on a battery powered gizmo doing about 1 TFLOP strapped to my head, and EXAFLOPS are basically here. This is all with at least TSMC 5nm, 3nm, 2nm, and multi-layer left on the table. After watching this relentless advance for 4 decades I'm pretty sure it will go beyond even that, but we just don't know what it will look like yet. It's become everyday tech to me, but if I look back the progression is absolutely astounding.
- jacquesm 5y agoIt is astounding. What is more astounding to me is that we burn so many of these cycles on eye candy, and that we waste so many of them on bloat. If not for that your battery powered gizmo would run for many days on one charge instead of having to be connected to its umbilical for 8 hours every night.
- interstice 5y agoIf that’s astounding think about what most of us spend our time doing with the insane amount of processing power available between our ears.
- orbifold 5y agomost of that processing power is unfortunately special purpose and can't be easily repurposed for something else. We have very good vision processing, but it is not like you can entirely high-jack that for something else.
- jacquesm 5y agoSure, but we didn't engineer that with performance in mind, and with computers it was enough to declare a previous generation obsolete. Whereas productivity for computer based applications was actually pretty good for the first generation of those machines, pretty much every cycle counted. Some people used them to play games and there was a recreational element to programming in its own right but it wasn't as though anybody would burn cycles to give a UI the texture of the real thing, it was a computer that worked and it produced results, which was all that mattered.
- volta83 5y agoFrom the same source two weeks ago: https://www.nextplatform.com/2021/10/26/china-has-already-reached-exascale-on-two-separate-systems/ https://www.nextplatform.com/2021/10/26/china-has-already-re... Do they read their own news? China won Exascale. Twice. Before anybody else. Is there an MI200 systems in the Top500 yet? Supercomputing 2021 is running and the updated November 2021 Top500 list was announced. There is only one system in the top 10, and that's an NVIDIA A100 system from Microsoft. The only 2 systems with > 100 PFLOPS are Summit and Fugaku.
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- visionscaper 5y agoWhat software will they use to, for instance, train large deep learning models? Nvidia has CUDA, AMD has what? Are they writing new software from scratch? Maybe they have a lot of frameworks to solve problems in the “traditional” HPC space (eg weather forecasts), but in the ML space I only heard of ROCm which seems to be poorly supported. AMD seems such an odd choice for “AI supercomputers”.
- trynumber9 5y agoROCm works with Tensorflow, Pytorch, etc. This generation they added more matrix throughput for AI workloads but CDNA is still compute focused, hence the name.
- buryat 5y agoI'd be selling my NVidia stocks tomorrow if I had them
- FeepingCreature 5y agoWho actually cares about FP64 for AI? All I've seen has been going the other way, ie. bfloat16 or even 8-bit floats. Since neural transition functions are largely characterized by a single point of inflection, it seems hard to see how you'd make 32 bits of mantissa pay rent even in principle.
- philjohn 5y agoThese aren't for AI workloads, they're for things like simulating atomic blasts.
- MayeulC 5y agoOr space simulations: https://spaceengine.org/news/blog210611/ https://spaceengine.org/news/blog210611/ > FP64 is extremely slow on Nvidia and AMD GPU, thanks to market segmentation: full performance with FP64 is enabled only on “professional” cards like Quadro. So for consumer hardware, we implemented FP64 emulation using two FP32 numbers. Performance is still not great, but it’s much better than using hardware FP64.
- touisteur 5y agoI think they market those fp64 things for the simulation market, which is basically pretty much every supercomputer's mission (I'm simplifying). The A100 also has specific silicium for fp64 (so called dp tensor cores) that you can't find in lower end datacenter stuff. FP64 really stings even on (e.g) mid-end nvidia hw, what with the 1:32 handbrake. https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#arithmetic-instructions__throughput-native-arithmetic-instructions https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.... for reference