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Performance-wise they seem to be on par with the high-end intel 11th gen mobile processors and nvidia 3060. Power-wise these chips look like they landed from a

Performance-wise they seem to be on par with the high-end intel 11th gen mobile processors and nvidia 3060. Power-wise these chips look like they landed from a different planet. 50% less power draw for most workloads. Will we get such efficiencies when intel hits 5nm?

dangus 5y ago
> Will we get such efficiencies when intel hits 5nm? I think the answer is "maybe," "probably," or "sort of." But I also wonder if x86 can ever truly outdo ARM on power efficiency. If we want potential evidence, we could look at what AMD is able to do on TSMC's manufacturing: better than Intel, but still short of Apple. Then again, AMD is tiny compared to Apple and Intel. Granted, I think I'm vastly oversimplifying processor architecture. I know it's way more complicated than "x86 vs. ARM."
- jjoonathan 5y ago
  Isn't AMD still a node behind Apple? They both use TSMC, but my impression was that Apple was the largest customer bankrolling the leading node and therefore got first crack at it.
  - eightysixfour 5y ago
    Yes, AMD is still a full TSMC node behind.
  - laydn 5y ago
    I am surprised that Apple sources more wafers than AMD from TSMC. Are they really the largest customer in terms of wafers, or are they getting better deals thanks to their enormous cash reserves and financing abilities?
    - jjoonathan 5y ago
      Yep, Apple is the biggest customer. Apple is 25% of TSMC's revenue, AMD is only 10% -- and that's after the recent growth spurt. Just one year ago, AMD was behind Apple, Huawei, Qualcomm, Broadcomm, and NVidia.
      - Someone 5y ago
        That’s a different metric than “number of wafers”. Apple likely pays quite a premium for using the newer tech.
        jjoonathan 5y ago
        Of course, but TSMC pays its shareholders in money, not wafers, so money is the correct metric for influence.
    - neogodless 5y ago
      AMD sources a double-digit market share of PC/server CPUs, plus their GPUs, and APU chips for consoles. On the flip side, Apple sources iPhones, iPads and other chips, plus this new line of Apple Silicon.
    - KptMarchewa 5y ago
      Even server market is small compared to mobile.
    - IOT_Apprentice 5y ago
      How many units is AMD shipping/Quarter vs Apple? Heck, Sony & Microsoft can't even get PS5s and Xboxes in customer hands 1 year after release. I would expect it is a combination of Apple's volume of phones shipped/quarter and cash reserves.
    - rsynnott 5y ago
      Apple can probably also afford to spend more. Like, if going from 7nm to 5nm early puts an extra $30 per laptop chip on their chips, that is probably fine for Apple; they're charging the same for a base-model M1 16" MBP as they did for the Intel one, but their costs are almost certainly quite a lot lower (the markups on higher-end Intel laptop chips are enormous, and they also don't have to pay for a GPU). For AMD, that might be a much larger deal; on the low-end that sort of price increase would give them a lot of trouble. Apple doesn't really have a low-end (even the chips in the Intel MacBook Air were quite expensive), giving them more flexibility here.
  - hajile 5y ago
    Even when you compare A12 on 7nm, the numbers don't look very good for AMD.
- intricatedetail 5y ago
  Now all ARM and Apple need to do is to persuade governments to ban x86 as not being energy efficient. Just like they want to ban diesel cars etc. Could be a tough battle for Intel.
- api 5y ago
  My understanding is that X86 can never outdo ARM on power because of the difficulty of parallel instruction decoding.
  - dahfizz 5y ago
    CISC was always a mistake, it just took a company the size of Apple to overcome the inertia of the established x86.
    - api 5y ago
      Sort of... RISC and CISC are really misnomers. The problem with X86 is not the number of instructions (ARM has a lot too!) but the variable length and difficult to decode instruction format. It's fine to have tons of instructions if they are trivial to decode and decoding can be easily parallelized.
      - dahfizz 5y ago
        CISC == Complex Instruction Set, not Large Instruction Set. As you say, the issue with x86 is how complicated it is, not necessarily how large it is.
    - tenebrisalietum 5y ago
      CISC was not a mistake when RAM was hundreds of dollars per kilobyte in the 70's and early 80s. Made sense to get as much out of a byte of memory instruction-wise as possible.
    - inkyoto 5y ago
      Not exactly a mistake, more of a compounding factor of market forces, who could execute and deliver (and who could not), and the rise of worse is better. The 80s was a time of research and experimentation, occasionally getting pretty wild. Intel had an «object-oriented» CPU, iAPX 432, which has slightly faster than immediately flopped. And they also had a hybrid RISC/VLIW design (i860) that could be outperform every other design out there – if the stars up in the sky would converge in the right space and time sequence, and the compiler could bundle instructions up efficiently. Intel also had a very good i960 RISC design. Which was, in fact, so good that the boys with MBA over at Intel have got stumped not knowing what to do with it and chickened out (i960 was considered as a x86 replacement for a time and the future would look quite different from today). Motorola was flirting with CPU's for a long while as well, but never took them seriously enough to see them through to the end as a serious business, for defence contracts and the field radio equipment (and later mobile phones) were their two major cash cows. By the way, Motorola also had cool DSP designs with the true Harvard architecture with multiple data buses, and a single 3 operand instruction, e.g. «ADD A, B, C» could transfer A, B, C using three separate data buses – simultaneously. Data transfers were insanely fast. INMOS got busy building transputers that could be «grown» infinitely (theoretically) into a gigantic computing «thing», and were programmed in Occam, with no assembly language even being available for the chip. They did not get anywhere. The Japanese built the Smalltalk VM byte codes into a Katana processor, and were mulling over the idea of doing the same for Prolog. Prolog and AI started getting really big back then until both faded into obscurity for a couple of decades. There was no shortage of great designs and ideas, but no-one had an idea of what the future of personal computing was going to be, therefore everyone was hedging varying bets. Digital had great hardware but they bet on minicomputers and snobbishly continued to ignore PC's until it was too late. They actually missed the server market boat as well as, by the time when they arrived, the bed had already become crowded with new lovers, and only the ones who had more money could win. RISC vendors were riding the wave out with servers and workstations, until around the mid-aughts, when Intel finally ramped up the production of cheap and dirty Pentium 4 CPU's that could be used in a simple SMP set up, and Google / Facebook were quick to proceed with building out their own server farms filled with cheap and disposable commodity x86 blades. It quickly became too expensive for vertically integrated RISC vendors to keep their own CPU design teams on the payroll. One by one, the RISC vendors have all, too, gradually faded into obscurity. One thing that absolutely sucked back them was that nearly no one could afford any of those amazing toys, unless it was a business with a fat budget. You could read, but you could not touch most of them. The documentation was gorgeous, though, and also prepared by professional technical writers in Adobe FrameMaker. Now, I can spin up a VM in a public cloud with a custom built TPU (or, NPU) within a few moments, use for as long as I have to, and I won't have to leave my own desk chair and it will be mine for as long as I can afford paying for it. All of that has left one with pretty much one living CISC fossil and multiple off-shots of the load-and-store architecture, of which RISC is one.
gigatexal 5y ago
Yeah I am satisfied with this performance. I’m not a gamer. And even if the CPU can’t take advantage of the 400GB/s 250 or so is very good indeed. This is all low hanging fruit for future revisions of this chip. The A15 based cores will further improve single core IPC and in turn make MT workloads even better. Basically if this is the floor then the sky won’t be high enough to contain where we go next.
GeekyBear 5y ago
For a laptop chip, single threaded integer performance is on par. Multi-threaded integer and floating point performance is not. >In the aggregate scores – there’s two sides. On the SPECint work suite, the M1 Max lies +37% ahead of the best competition, it’s a very clear win here and given the power levels and TDPs, the performance per watt advantages is clear. The M1 Max is also able to outperform desktop chips such as the 11900K, or AMD’s 5800X. In the SPECfp suite, the M1 Max is in its own category of silicon with no comparison in the market. It completely demolishes any laptop contender, showcasing 2.2x performance of the second-best laptop chip. The M1 Max even manages to outperform the 16-core 5950X – a chip whose package power is at 142W, with rest of system even quite above that. It’s an absolutely absurd comparison and a situation we haven’t seen the likes of. https://www.anandtech.com/print/17024/apple-m1-max-performance-review https://www.anandtech.com/print/17024/apple-m1-max-performan... We'll see what happens when they make a desktop chip and are no longer so constrained on thermals and power draw. The unreleased Mac Pro chip is said to have the resources of either two or four M1 Pro chips glued together.
- simonh 5y ago
  The Mac pro chip will also likely use the next generation of core architecture as well.
  - GeekyBear 5y ago
    Yes, this year's iPhone chip did get a newer version of the performance core. >with a score of 7.28 in the integer suite, Apple’s A15 P-core is on equal footing with AMD’s Zen3-based Ryzen 5950X with a score of 7.29, and ahead of M1 with a score of 6.66 https://www.anandtech.com/show/16983/the-apple-a15-soc-performance-review-faster-more-efficient/2 https://www.anandtech.com/show/16983/the-apple-a15-soc-perfo... You'll have to look in the charts, but on single threaded floating point the scores are 10.15 for the A15, 9.58 for the 11900K, and 9.79 for the 5950X. Having your phone chip match or beat Intel and AMD's desktop variants on single core performance (with a phone's memory bandwidth) is fairly impressive in itself.
    - 5y ago
uluyol 5y ago
I don't think these efficiencies are just from the node advantage. The fact is that Apple chips follow mobile designs and are highly integrated SoCs where Apple can optimize every aspect of the system in exchange for losing flexibility (no mixing and matching of components). In contrast to mobile processors, x86 processors live in a world where flexibility is demanded. I need to be able to pick how much RAM I want, which WIFI modem, which graphics, and so on (where I is a combination of the consumer and laptop manufacturer). Sure, laptop processors have gotten more integrated lately, but it's not to the same degree. Competition from Apple might pressure Intel and AMD to integrate much more and sacrifice this flexibility in order to squeeze out better power efficiencies.
- cududa 5y ago
  As a teenager in 2005/ 2006, had an obsession with overclocking AMD Opteron 165's. DFI motherboards allowed you to set the ratios for FSB/HTT, LDT/FSB, CPU/FSB, etc. I'd hunt like crazy for specific OCZ DDR2 RAM modules from specific batches that had the tolerances I was looking for. At a few points, had the highest perf overclocks (even among liquid cooling - mine was passive with a polished heatsink) on various leaderboards and my 4GB DDR2 system frequently could beat out 8GB DDR3 systems (with full stability via MemTest x86) on GeekBench like tests. WRT Apple Silicon I think about those days a lot - just thinking about the perf AMD, OCZ, and DFI could have repeatedly squeezed out if they all were one company setting the same tolerances on all silicon and power delivery. I have to imagine a large amount of the perf wins come from having consistent FSB, HTT, and LDT channels that can have the channel relay ratios optimally configured instead of buffering up the "lowest common denominator" silicon manufacturing tolerances.
- garbagecoder 5y ago
  This thread is just total cope.
ksec 5y ago
>Will we get such efficiencies when intel hits 5nm? Judging from everything we know. Even in the most optimistic scenario. The answer is no. Note: And Intel doesn't have 5nm, they go to 4nm and then 3nm. But the answer is still the same. Edit: For those wondering how the conclusion was arrived, you take a look at the Alderlake SPEC_INT and Geekbench score, look at the power usage per core. ( Forget MT benchmarks ), you scale it by target IPC improvement and node improvement. You should see the gap is in terms of efficiencies is still behind.

dangus 5y ago

> Will we get such efficiencies when intel hits 5nm? I think the answer is "maybe," "probably," or "sort of." But I also wonder if x86 can ever truly outdo ARM on power efficiency. If we want potential evidence, we could look at what AMD is able to do on TSMC's manufacturing: better than Intel, but still short of Apple. Then again, AMD is tiny compared to Apple and Intel. Granted, I think I'm vastly oversimplifying processor architecture. I know it's way more complicated than "x86 vs. ARM."

jjoonathan 5y ago
Isn't AMD still a node behind Apple? They both use TSMC, but my impression was that Apple was the largest customer bankrolling the leading node and therefore got first crack at it.
- eightysixfour 5y ago
  Yes, AMD is still a full TSMC node behind.
- laydn 5y ago
  I am surprised that Apple sources more wafers than AMD from TSMC. Are they really the largest customer in terms of wafers, or are they getting better deals thanks to their enormous cash reserves and financing abilities?
  - jjoonathan 5y ago
    Yep, Apple is the biggest customer. Apple is 25% of TSMC's revenue, AMD is only 10% -- and that's after the recent growth spurt. Just one year ago, AMD was behind Apple, Huawei, Qualcomm, Broadcomm, and NVidia.
    - Someone 5y ago
      That’s a different metric than “number of wafers”. Apple likely pays quite a premium for using the newer tech.
      - jjoonathan 5y ago
        Of course, but TSMC pays its shareholders in money, not wafers, so money is the correct metric for influence.
  - neogodless 5y ago
    AMD sources a double-digit market share of PC/server CPUs, plus their GPUs, and APU chips for consoles. On the flip side, Apple sources iPhones, iPads and other chips, plus this new line of Apple Silicon.
  - KptMarchewa 5y ago
    Even server market is small compared to mobile.
  - IOT_Apprentice 5y ago
    How many units is AMD shipping/Quarter vs Apple? Heck, Sony & Microsoft can't even get PS5s and Xboxes in customer hands 1 year after release. I would expect it is a combination of Apple's volume of phones shipped/quarter and cash reserves.
  - rsynnott 5y ago
    Apple can probably also afford to spend more. Like, if going from 7nm to 5nm early puts an extra $30 per laptop chip on their chips, that is probably fine for Apple; they're charging the same for a base-model M1 16" MBP as they did for the Intel one, but their costs are almost certainly quite a lot lower (the markups on higher-end Intel laptop chips are enormous, and they also don't have to pay for a GPU). For AMD, that might be a much larger deal; on the low-end that sort of price increase would give them a lot of trouble. Apple doesn't really have a low-end (even the chips in the Intel MacBook Air were quite expensive), giving them more flexibility here.
- hajile 5y ago
  Even when you compare A12 on 7nm, the numbers don't look very good for AMD.
intricatedetail 5y ago
Now all ARM and Apple need to do is to persuade governments to ban x86 as not being energy efficient. Just like they want to ban diesel cars etc. Could be a tough battle for Intel.
api 5y ago
My understanding is that X86 can never outdo ARM on power because of the difficulty of parallel instruction decoding.
- dahfizz 5y ago
  CISC was always a mistake, it just took a company the size of Apple to overcome the inertia of the established x86.
  - api 5y ago
    Sort of... RISC and CISC are really misnomers. The problem with X86 is not the number of instructions (ARM has a lot too!) but the variable length and difficult to decode instruction format. It's fine to have tons of instructions if they are trivial to decode and decoding can be easily parallelized.
    - dahfizz 5y ago
      CISC == Complex Instruction Set, not Large Instruction Set. As you say, the issue with x86 is how complicated it is, not necessarily how large it is.
  - tenebrisalietum 5y ago
    CISC was not a mistake when RAM was hundreds of dollars per kilobyte in the 70's and early 80s. Made sense to get as much out of a byte of memory instruction-wise as possible.
  - inkyoto 5y ago
    Not exactly a mistake, more of a compounding factor of market forces, who could execute and deliver (and who could not), and the rise of worse is better. The 80s was a time of research and experimentation, occasionally getting pretty wild. Intel had an «object-oriented» CPU, iAPX 432, which has slightly faster than immediately flopped. And they also had a hybrid RISC/VLIW design (i860) that could be outperform every other design out there – if the stars up in the sky would converge in the right space and time sequence, and the compiler could bundle instructions up efficiently. Intel also had a very good i960 RISC design. Which was, in fact, so good that the boys with MBA over at Intel have got stumped not knowing what to do with it and chickened out (i960 was considered as a x86 replacement for a time and the future would look quite different from today). Motorola was flirting with CPU's for a long while as well, but never took them seriously enough to see them through to the end as a serious business, for defence contracts and the field radio equipment (and later mobile phones) were their two major cash cows. By the way, Motorola also had cool DSP designs with the true Harvard architecture with multiple data buses, and a single 3 operand instruction, e.g. «ADD A, B, C» could transfer A, B, C using three separate data buses – simultaneously. Data transfers were insanely fast. INMOS got busy building transputers that could be «grown» infinitely (theoretically) into a gigantic computing «thing», and were programmed in Occam, with no assembly language even being available for the chip. They did not get anywhere. The Japanese built the Smalltalk VM byte codes into a Katana processor, and were mulling over the idea of doing the same for Prolog. Prolog and AI started getting really big back then until both faded into obscurity for a couple of decades. There was no shortage of great designs and ideas, but no-one had an idea of what the future of personal computing was going to be, therefore everyone was hedging varying bets. Digital had great hardware but they bet on minicomputers and snobbishly continued to ignore PC's until it was too late. They actually missed the server market boat as well as, by the time when they arrived, the bed had already become crowded with new lovers, and only the ones who had more money could win. RISC vendors were riding the wave out with servers and workstations, until around the mid-aughts, when Intel finally ramped up the production of cheap and dirty Pentium 4 CPU's that could be used in a simple SMP set up, and Google / Facebook were quick to proceed with building out their own server farms filled with cheap and disposable commodity x86 blades. It quickly became too expensive for vertically integrated RISC vendors to keep their own CPU design teams on the payroll. One by one, the RISC vendors have all, too, gradually faded into obscurity. One thing that absolutely sucked back them was that nearly no one could afford any of those amazing toys, unless it was a business with a fat budget. You could read, but you could not touch most of them. The documentation was gorgeous, though, and also prepared by professional technical writers in Adobe FrameMaker. Now, I can spin up a VM in a public cloud with a custom built TPU (or, NPU) within a few moments, use for as long as I have to, and I won't have to leave my own desk chair and it will be mine for as long as I can afford paying for it. All of that has left one with pretty much one living CISC fossil and multiple off-shots of the load-and-store architecture, of which RISC is one.

gigatexal 5y ago

Yeah I am satisfied with this performance. I’m not a gamer. And even if the CPU can’t take advantage of the 400GB/s 250 or so is very good indeed. This is all low hanging fruit for future revisions of this chip. The A15 based cores will further improve single core IPC and in turn make MT workloads even better. Basically if this is the floor then the sky won’t be high enough to contain where we go next.

GeekyBear 5y ago

For a laptop chip, single threaded integer performance is on par. Multi-threaded integer and floating point performance is not. >In the aggregate scores – there’s two sides. On the SPECint work suite, the M1 Max lies +37% ahead of the best competition, it’s a very clear win here and given the power levels and TDPs, the performance per watt advantages is clear. The M1 Max is also able to outperform desktop chips such as the 11900K, or AMD’s 5800X. In the SPECfp suite, the M1 Max is in its own category of silicon with no comparison in the market. It completely demolishes any laptop contender, showcasing 2.2x performance of the second-best laptop chip. The M1 Max even manages to outperform the 16-core 5950X – a chip whose package power is at 142W, with rest of system even quite above that. It’s an absolutely absurd comparison and a situation we haven’t seen the likes of. https://www.anandtech.com/print/17024/apple-m1-max-performance-review https://www.anandtech.com/print/17024/apple-m1-max-performan... We'll see what happens when they make a desktop chip and are no longer so constrained on thermals and power draw. The unreleased Mac Pro chip is said to have the resources of either two or four M1 Pro chips glued together.

simonh 5y ago
The Mac pro chip will also likely use the next generation of core architecture as well.
- GeekyBear 5y ago
  Yes, this year's iPhone chip did get a newer version of the performance core. >with a score of 7.28 in the integer suite, Apple’s A15 P-core is on equal footing with AMD’s Zen3-based Ryzen 5950X with a score of 7.29, and ahead of M1 with a score of 6.66 https://www.anandtech.com/show/16983/the-apple-a15-soc-performance-review-faster-more-efficient/2 https://www.anandtech.com/show/16983/the-apple-a15-soc-perfo... You'll have to look in the charts, but on single threaded floating point the scores are 10.15 for the A15, 9.58 for the 11900K, and 9.79 for the 5950X. Having your phone chip match or beat Intel and AMD's desktop variants on single core performance (with a phone's memory bandwidth) is fairly impressive in itself.
  - 5y ago

uluyol 5y ago

I don't think these efficiencies are just from the node advantage. The fact is that Apple chips follow mobile designs and are highly integrated SoCs where Apple can optimize every aspect of the system in exchange for losing flexibility (no mixing and matching of components). In contrast to mobile processors, x86 processors live in a world where flexibility is demanded. I need to be able to pick how much RAM I want, which WIFI modem, which graphics, and so on (where I is a combination of the consumer and laptop manufacturer). Sure, laptop processors have gotten more integrated lately, but it's not to the same degree. Competition from Apple might pressure Intel and AMD to integrate much more and sacrifice this flexibility in order to squeeze out better power efficiencies.

cududa 5y ago
As a teenager in 2005/ 2006, had an obsession with overclocking AMD Opteron 165's. DFI motherboards allowed you to set the ratios for FSB/HTT, LDT/FSB, CPU/FSB, etc. I'd hunt like crazy for specific OCZ DDR2 RAM modules from specific batches that had the tolerances I was looking for. At a few points, had the highest perf overclocks (even among liquid cooling - mine was passive with a polished heatsink) on various leaderboards and my 4GB DDR2 system frequently could beat out 8GB DDR3 systems (with full stability via MemTest x86) on GeekBench like tests. WRT Apple Silicon I think about those days a lot - just thinking about the perf AMD, OCZ, and DFI could have repeatedly squeezed out if they all were one company setting the same tolerances on all silicon and power delivery. I have to imagine a large amount of the perf wins come from having consistent FSB, HTT, and LDT channels that can have the channel relay ratios optimally configured instead of buffering up the "lowest common denominator" silicon manufacturing tolerances.
garbagecoder 5y ago
This thread is just total cope.

ksec 5y ago

>Will we get such efficiencies when intel hits 5nm? Judging from everything we know. Even in the most optimistic scenario. The answer is no. Note: And Intel doesn't have 5nm, they go to 4nm and then 3nm. But the answer is still the same. Edit: For those wondering how the conclusion was arrived, you take a look at the Alderlake SPEC_INT and Geekbench score, look at the power usage per core. ( Forget MT benchmarks ), you scale it by target IPC improvement and node improvement. You should see the gap is in terms of efficiencies is still behind.