33 ms·
What I thought was interesting was the caching layout: L1: Typical L1 cache L2: On-die cache like L1 but more/slower L3: No such thing. It's just L2 on anoth
by geocrasher 5y ago
What I thought was interesting was the caching layout:
L1: Typical L1 cache
L2: On-die cache like L1 but more/slower
L3: No such thing. It's just L2 on another core
L4: No such things. It's just L2 on another chip.
Fantastic stuff.
- jpgvm 5y agoYeah it remains to be seen how well this will work in practice. In general I think it's an awesome idea... but years of "that sounds cool and logical" when it comes to cache coherency at those speeds leads my actual reaction to be "yeah... that is going to break in a horrible way or expose nasty side channel attacks".
- IshKebab 5y agoYeah I was wondering about side channel attacks, but L3 cache is already shared so it isn't really any different.
- eitland 5y ago> or expose nasty side channel attacks". Good point, but also keep in mind that unlike desktop/laptop processors these probably aren't going to be running untrusted JS from random web pages or binary "drivers" to watch premier league free, use Photoshop without paying etc. Side note: Assume you don't have extremely powerful enemies that are targeting you just keeping untrusted code and access off certain machines does wonders on a general basis.
- rbanffy 5y ago> aren't going to be running untrusted JS from random web pages But they will be partitioned and run Linux under zVM and KVM. IBM does that with z15’s in their public cloud services. I’m pretty sure they have lots and lots of mitigation and security contexts flowing along cache data to make sure one context doesn’t expose information about to others.