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Slide 26 is interesting - arguing that cloud providers have an advantage for future CPU design since they can analyze so many real world customer workloads dire
by martinpw 5y ago
Slide 26 is interesting - arguing that cloud providers have an advantage for future CPU design since they can analyze so many real world customer workloads directly.
In previous roles I have worked with CPU vendors who have been very keen on getting access to profiling data from our workloads for design optimization, and lamenting the fact that it was hard to get such data and they were often limited to synthetic benchmark workloads when tuning new designs.
So this argument does sound like a valid one, and does imply AWS etc will have significant advantages in future designs.
- handrous 5y agoAn interesting application of a now-familiar pattern: get lots of users, spy on them at massive scale, use those data to dominate some other market in a way that, at most, a single digit count of companies in the world could conceivably compete with (because none but they have anything like the data that you do). See also: everything to do with "AI".
- thechao 5y agoHe sort of implies that “just better hardware” will peter out in the 2030s. I think he’s calling it at least 50 years too soon. Here’s why: (1) I think logic designers are still faffing about in term of optimizing their designs; and (2), I think there’s a lot of smart people thinking “incrementally” through what we’d consider paradigm shifts in HW implementation. That is, our fabs will just naturally segue into 3D, spintronics, etc. I think he even mentions 3D circuits? One thing a lot of people miss is that layout of the design is materially different in 3D vs 2D: in 2D layout is NP-hard (complete) without efficient polynomial approximations; in 3D layout is low-order polynomial. The reduction in layout complexity will allow us to design things that are unthinkable right now, due to layout constraints & wire congestion.
- hobofan 5y agoAren't "big" 3D circuits unfeasible due to temperature limitations, though?
- a1369209993 5y ago> Aren't "big" 3D circuits unfeasible due to temperature limitations, though? Less so than you'd think, since (as long as you can keep leakage current under control) heat is only generated when the circuits are active (barring leakage current, when bits are being flipped). So you can have arbitrarily large amounts of increasingly-rarely-used circuitry for various purposes. The naive-but-easy-to-understand example would be having separate, optimal circuitry for each machine instruction - the total number of gates is O(N*M), but the number of gates activated on each clock cycle (and thus the amount of waste heat generated) is only O(N), so you can keep adding new, perfectly-hardware-accelerated instructions up to the limits of physical space. In practice it's more complicated and less of a nonissue, but it's not "big circuits are useful in proportion to their surface area, not their volume", it's more "big circuits are less useful than their volume alone would suggest". (You do hit physical limits like the Bekenstein bound[0] eventually, but that's far enough out that we mostly don't care yet.) 0: https://en.wikipedia.org/wiki/Bekenstein_bound https://en.wikipedia.org/wiki/Bekenstein_bound
- nradov 5y agoHow are we going to cool those 3D chips?
- AprilArcus 5y agocould it be fabbed around a lattice of thermally conductive elements, like a menger sponge?
- thechao 5y agoThe commenter above is correct: just stop toggling HW. We already do this to a great extent; we’re limited in the number of custom implementations because we can’t wire everything together. 3D chips will have a lot more “dark” logic than current chips, but will be orders-of-magnitude more efficient (& thus powerful) due to deep customization. Also, remember the argument of my timeline is ~50–80 years out from now.
- justicezyx 5y agoIt's already happening. Intel design now are significantly influenced by Google and Amazon's data center needs.
- brendangregg 5y agoSure, and I have regular meetings with processor vendors who want to understand our workload to better serve it. But there's no easy or fast way for them to get low-level data, including processor trace (cycle logs), across many customers. This can be vast amounts of data: Tbytes. If you are working on processors at a cloud vendor and want to know some low-level CPU detail, you could answer it immediately across a million customer workloads.
- brendangregg 5y agoThanks, I think it's the start of a new "cloud CPU" era. Cloud vendors have already split workloads into different instance types, so directly analyzing their workloads and developing CPUs for each instance type will lead to further performance wins. This may prompt the creation of even more instance types just to further separate workload types for future CPU specialization. In the future, products like AWS outposts may become far more desirable over commodity hardware, as customers know it provides access to specialized CPUs and their performance. It's a path for cloud computing vendors to own the datacenters as well. (Note that my predictions are not based on any internal knowledge: I'm just describing what I personally would be doing if I were a cloud vendor.)
- pm90 5y agoIn hindsight, I wonder why Intel or other chip makers didn’t invest more in datacenters/hosting companies just to get this valuable data.
- brendangregg 5y agoYes, this was in my predictions: Processor vendors may offer their own clouds (either built or acquired) to get the same level of workload access.