5 ms·

What needs to happen is to bring ECC to all levels of a chips logic to solve this. ARM vs RISC-V vs x64 doesn't address the problem as nothing in them inherentl

What needs to happen is to bring ECC to all levels of a chips logic to solve this. ARM vs RISC-V vs x64 doesn't address the problem as nothing in them inherently solves the problem. Making adders that add with ECC will. If all of the logic also operates on ECC with the data, chip yields will also be improved. Say an core of the chip only produces the correct result 99% of the time, currently you have to disable that core. With ECC logic, you can still use it, as it doesn't matter if it has an additional 1% chance of a bit flip, as all of your logic is now immune to single bitflips. For mission critical logic/applications, one can scale up the ECC so its immune to more bitflips before an error is introduced.

jeffbee 5y ago
What leads us to believe that there is not already fault detection in execution units? We have really no idea what's going on at the gate level in CPUs.
- convolvatron 5y ago
  i know Intel and AMD like to hide hardware features - but given the design cost and the non-negligible overhead..one would suppose that they would at least surface a counter in the documentation..and probably even...you know, market it as a feature.
Dylan16807 5y ago
Is there a way to add ECC into an ALU without making it massively slower?
Someone 5y ago
I’m fairly sure you can’t do that. For example, suppose you have logic that uses some inputs to compute an output: A, B ⇒ C Add ECC bits to the inputs, and you want Aa, Bb ⇒ Cc Now, if you want this to detect errors made by the “⇒” part, you can’t do this as “drop the ECC bits, compute the result, compute the ECC bits of the result”. So, how do you compute the ECC bits from only the Aa and Bb bits without having to compute the C part? Depending on the ECC logic chosen, that might be doable for bit shifts, but for addition? For multiplication? For IEEE float square roots?
- extrapickles 5y ago
  You would have to develop a ECC that worked similar to homomorphic encryption, where you can do computations on the chipertext (or in this case, the ECC) without knowing the plain text. For this application, plain text would effectively be the int/float you are doing math on. Since its possible with crypto, I don’t think it’s an insurmountable problem to create an ECC code where Ecc(a+b)=Ecc(a)+Ecc(b) It will likely not be as bit efficient as ECC without that property. Checking the ECC would also add a bit of overhead, so at first you would want to only check on a store instruction where you have to wait to select the RAM page anyways.
  - Someone 5y ago
    “I don’t think it’s an insurmountable problem to create an ECC code where Ecc(a+b)=Ecc(a)+Ecc(b)” It wouldn’t, but that ECC wouldn’t work for multiplication instructions, square roots, etc. Dropping floating point and multiplication instructions will correct that, at the cost of significant speed. I also think any such ECC effectively would be a copy of computing a+b modulo some constant you can pick. If so, we’re effectively back at “compute the result twice, trap if the two results aren’t identical”

jeffbee 5y ago

What leads us to believe that there is not already fault detection in execution units? We have really no idea what's going on at the gate level in CPUs.

convolvatron 5y ago
i know Intel and AMD like to hide hardware features - but given the design cost and the non-negligible overhead..one would suppose that they would at least surface a counter in the documentation..and probably even...you know, market it as a feature.

Dylan16807 5y ago

Is there a way to add ECC into an ALU without making it massively slower?

Someone 5y ago

I’m fairly sure you can’t do that. For example, suppose you have logic that uses some inputs to compute an output: A, B ⇒ C Add ECC bits to the inputs, and you want Aa, Bb ⇒ Cc Now, if you want this to detect errors made by the “⇒” part, you can’t do this as “drop the ECC bits, compute the result, compute the ECC bits of the result”. So, how do you compute the ECC bits from only the Aa and Bb bits without having to compute the C part? Depending on the ECC logic chosen, that might be doable for bit shifts, but for addition? For multiplication? For IEEE float square roots?

extrapickles 5y ago
You would have to develop a ECC that worked similar to homomorphic encryption, where you can do computations on the chipertext (or in this case, the ECC) without knowing the plain text. For this application, plain text would effectively be the int/float you are doing math on. Since its possible with crypto, I don’t think it’s an insurmountable problem to create an ECC code where Ecc(a+b)=Ecc(a)+Ecc(b) It will likely not be as bit efficient as ECC without that property. Checking the ECC would also add a bit of overhead, so at first you would want to only check on a store instruction where you have to wait to select the RAM page anyways.
- Someone 5y ago
  “I don’t think it’s an insurmountable problem to create an ECC code where Ecc(a+b)=Ecc(a)+Ecc(b)” It wouldn’t, but that ECC wouldn’t work for multiplication instructions, square roots, etc. Dropping floating point and multiplication instructions will correct that, at the cost of significant speed. I also think any such ECC effectively would be a copy of computing a+b modulo some constant you can pick. If so, we’re effectively back at “compute the result twice, trap if the two results aren’t identical”