19 ms·

IBM creates 2nm chip

579 points by 0-_-0 5y ago

thombles 5y ago
I'm glad we have an industry standard for fingernail size at least.
- danmur 5y ago
  Haha, that was my favourite part. Wish they'd followed up by asking which fingernail and whose, when they last cut it etc.
- guidopallemans 5y ago
  That must be equal to 1cm^2, right? I guess you could cheat and use the area of a thumb nail, but then you could take it a step further and use the area of a horse's fingernail, which is at least 100 times larger...
  - mminer237 5y ago
    IBM used ~1.2cm^2 (150mm^2)
bullen 5y ago
I'm curious what the longevity at 100% will look like for these. Also peak performance is allready passed even with multicore because of RAM latency. I still think 14nm or larger will be coming out on top after a few decades of intense use. Time will tell!
- formerly_proven 5y ago
  > Also peak performance is allready passed even with multicore because of RAM latency. By that logic CPUs from today should be slower than those from 2005, since the real (uncached) memory latency has increased (significantly) for most systems. Though I suppose this means you could actually engineer workloads that run slower on a modern 5 GHz CPU than on a 2005-era Athlon 64.
  - erk__ 5y ago
    IBM already have a chip with a gigabyte of L3 cache, so maybe that combats the latency in another way
    - formerly_proven 5y ago
      Reducing average memory read/write latency (as well as increasing bandwidth) is the point of big caches - but, cet. par. bigger caches inherently have higher lookup latency, deeper cache hierarchies increase the latency further and cache sizes are also limited by ISA concerns (4K pages on x86 limit the size of VIPT caches). So a system with a deep cache hierarchy and large caches will perform better on average, but actually going out there and getting bits from main memory will take longer. Not least because the actual, physical latency of DRAM itself improves only very, very slowly, this makes old systems stand up quite well in this particular metric against modern systems.
- vardump 5y ago
  > I'm curious what the longevity at 100% will look like for these. Indeed. At this feature size I'd already start to be worried how long the chip will work.
  - MayeulC 5y ago
    Feature size seems to be 15nm, from the article. 2nm is marketing speech for transistor density.
jbverschoor 5y ago
That should also mean that the price per chip will decrease, because you can fit more on a single wafer
- Guthur 5y ago
  Not necessarily, and most likely no. The cost of craming so much in to such a small is not linear it's been getting more and more expensive. There are also factors like yield that come into play and potentially drive the costs up again.
- whoknowswhat11 5y ago
  Absolutely not - these will be by far the most expensive process nodes. 28nm probably where you want to be for cost - check out what raspberry pi and other lower cost products use
  - akmittal 5y ago
    I don't think it would be that much cheaper to make 28nm now. 2-3 generations behind mainstream should be cheapest. PI 4 was launched around 2 years back. So if PI5 is launched today they will mist probably go for 12nm.
    - whoknowswhat11 5y ago
      Depends on volume. Tape out / design / validation / mask costs and other nonrecurring costs get high or very low based on node size. For Apple volume latest and later nodes may be cheapest per unit performance. Most folks aren't Apple
    - 0-_-0 5y ago
      According to this, 28 nm is indeed the cheapest: http://www.monolithic3d.com/blog/moores-law-did-indeed-stop-at-28nm http://www.monolithic3d.com/blog/moores-law-did-indeed-stop-...
      - akmittal 5y ago
birdyrooster 5y ago
Can IBM scale this production up themselves?
- piokoch 5y ago
  Rather not, they are not in the business of mass production of this kind of chips. They don't need, probably they will own a few really hot patents (and they deserve them). The article mention they will team up with Samsung and Intel. If Intel managed to produce have that chip at scale this would really helped them, given the fact they are behind Apple/TCMS and AMD.
  - bogwog 5y ago
    > The article mention they will team up with Samsung and Intel. Wouldn't an Intel partnership be bad for their entire Power 9 business? I'm not very familiar with Power 9, but as I understand it's marketed as an alternative to x86 in the server/cloud hardware. This advancement along with Intel's stagnation could be a good opportunity for IBM to gain more market share there. Maybe Power 9 workstations will even become a thing most people can afford.
    - salmo 5y ago
      Power9 is actually made at GlobalFoundries. And it's mostly just in (fading) IBM i systems and one-off super computers. Power 10 is supposedly on the horizon. There's a handful of niche workstations, and "a partnership" with Google/Rackspace, but I can't even see how to get one of those via GCP or Rackspace. It's an interesting chip, and I'm a big fan of CPU diversity, but Power's time has come and gone. It's really only supported internally at this point: IBM i, AIX, RedHat, with Debian and (Open|Free)BSD as the outliers. We'll just have ARM and RISC-V as non-x86 "real" CPUs, I guess.
      - spijdar 5y ago
        I think you're underselling it a bit. It's supported on RHEL, SUSE, Fedora, Debian, Ubuntu, several more niche distros besides, but aren't those the dominant OSes outside Windows (for servers/workstations)? Unless I'm misinterpreting the meaning of "outliers". And support goes out pretty far. Just to rattle some examples of public "support" for power8/9, Anaconda lists power9 binaries under x86 for their installer (no mention of ARM), PyPy has Power support, V8 has Power support (the basis for Power ports of Chromium w/JIT'd javascript), nvidia has Power drivers/CUDA runtimes on their main download portal. I'm not trying to paint it as largely supported or even a great platform, but I think it might now be better supported than it ever has been. It's little-endian now, software compatibility is almost 100% outside of JIT'd things (and many JIT'd things have Power ports). If/when it fails or fades away, it'll be because it wasn't good enough to displace the alternatives, rather than because no one supported it or it was too difficult to use/support.
tromp 5y ago
The table in the article suggests to me that instead of this fictional "feature size", we could use the achievable transistor area as a more meaningful measure of process scale. IBM achieved 50B transistors in 150mm^2, for a per-transistor area of 3000 nm^2. TSMC's 5nm process (used by Apple's M1 chip) apparently achieves a transistor area of 5837 nm^2, while Intel's 10nm is lagging at roughly 10000 nm^2.
- iamgopal 5y ago
  Shouldn’t we need to use volume instead of area ?
  - tromp 5y ago
    I think cooling requirements will keep use of the 3rd dimension severely limited in the foreseeable future. Also, the required number of lithographic steps might make it economically infeasible.
    - londons_explore 5y ago
      NAND manages 100+ stacked transistors. Things like processor caches have similarly low average switching rates, so it doesn't seem out of the realm of possibility to see use of the third dimension for logic.
      - selectodude 5y ago
        NAND isn’t ever all being used at the same time and even then it can get very hot. SSD thermal throttling is a genuine issue.
        xxs 5y ago
        SSD thermal throttle the controller =not= the NAND, itself... which actually doesn't even like to be cold.
akmittal 5y ago
Hopefully after this next Raspberry pi will finally have a 7nm chip
- 0-_-0 5y ago
  I'm thinking the extra production capacity that needs to be put in to handle the current chip shortage must get freed up sometime, which should mean more than the expected excess 7nm capacity a few years down the line...
chipzillazilla 5y ago
Do these IBM 2nm chips have an actual function? Just curious what they actually do.
- enkid 5y ago
  They do the same things the bigger chips do faster and with less power.
  - mrweasel 5y ago
    I don't think that was the question, not that you're wrong. The question might be more the same one I had: Are they actually making a 2nm POWER processor, or is this just some basic chip that shows that the process works?
    - IanCutress 5y ago
      Basic chip trying lots of different things with the manufacturing technology to profile them/see how they work. It's a proof of concept.
- daniel-thompson 5y ago
  From TFA: > No details on the 2nm test chip have been provided, although at this stage it is likely to be a simplified SRAM test vehicle with a little logic. The 12-inch wafer images showcase a variety of different light diffractions, which likely points to a variety of test cases to affirm the viability of the technology. IBM says that the test design uses a multi-Vt scheme for high-performance and high-efficiency application demonstrations.
  - BlueTemplar 5y ago
    > a variety of different light diffractions So, their function is that they look really cool ? Yes, yes, I'm leaving...
PicassoCTs 5y ago
Moore to the rescue. But can they keep up with the bloatware curve? If we cook all the horsepower down to glue, and glue ever more horrible libraries together, when will we reach peak horse-pisa-stack? I stopped eyeing for cpu advances a decade ago. If we could have a NN-driven prefetcher that is able to anticipate cache misses from instructions and data, 300 cycles ahead of time, that would be some speedup we all could benefit from, if it found its way into hardware. https://drive.google.com/file/d/17THn_qNQJTH0ewRvDukllRAKSFgEI9mm/view https://drive.google.com/file/d/17THn_qNQJTH0ewRvDukllRAKSFg...
- simias 5y ago
  I think it's the glue that keeps up with the CPU power curve, so to speak. You give devs more RAM and more cycles and they'll find a way to use them with inefficient languages, suboptimal code and shiny UI. I think it's important to remember that for instance Zelda: Link's Awakening was less than 512KiB in size and ran on a primitive 1MHz CPU. But at the same time we have to acknowledge how better it can be to develop for a modern target. We can decide to waste this potential with bloated electron runtimes, but we can also leverage it to make things we thought impossible before.
  - enkid 5y ago
    I don't think this is a good example. Zelda: Link's Awakening, while ground breaking, can be, and has been improved upon. Using those resources to create a better user experience is not inefficiency. That's the entire point of a video game - a good user experience.
    - dijit 5y ago
      I think you're not disagreeing with the parent. You can have an exceptional experience with a game in less than the storage and processing power it takes to run Hello World today; To that end you can make things better and nicer than Links Awakening with modern resources. But can you make something 500-3000x better? (that's the order of magnitude we're talking about, with Slack vs Zelda)
mlacks 5y ago
not much experience in this space: who would use this patent? I see Samsung and Intel as partners; do they simply use IBMs research with their own manufacturing to produce this? Also curious if this development will affect apple silicon or TSMCs bottom line in the near future
- dahfizz 5y ago
  PowerPC in general is somewhat niche. Its used in things from networking switches to fighter jets, but nothing that would affect mainstream CPU market. I can't imagine Apple jumping to a new architecture after just developing their own ARM chips.
andy_ppp 5y ago
Interesting table showing millions of transistors per mm^2 there. Is Intel’s 10nm really having more transistor density that TSMC’s 7nm? This could mean some big things coming from AMD moving to 5nm next year!
- xxs 5y ago
  yes, intel 10nm is similar to tsmc's 7mn. Unfortunately for Intel they have struggled to produce any non-low-powered chips on 10nm. That can be alleviated by not cramming the entire area with transistors. Overall the numbers of "X" nm mean very little
  - colinmhayes 5y ago
    Intel 10nm desktop is releasing this fall.
    - xxs 5y ago
      > Intel 10nm desktop is releasing this fall. Hence, "Intel they have struggled". For 5years. We still don't know how it's going to turn out.
- ksec 5y ago
  And and it has been stated gazillion times, except most media doesn't like to report it. Which leads to discussion that goes no where.
slver 5y ago
I'm still waiting for this new persistent memory IBM had. But anyway, I'm happy to see this density is even possible. Exciting times ahead.
blodkorv 5y ago
How big is IBMs chip manufacturing? Power seems to be more and more out of fashion and other chips seems to preform way better. They cant be making much of those?
- agumonkey 5y ago
  Maybe with the relocalization of fabs they will have an opportunity to grow that side again.
- ilogik 5y ago
  if only there were a handy article on anandtech, linked to on HN that could answer this question
- jhickok 5y ago
  IBM still makes a lot of money on Power, but at the moment it is a managed decline. Ever refresh cycle they get a nice big revenue bump, and they have a pretty large Fortune 500/US Defense base that won't be leaving Power any time soon. Soon IBM will be the biggest consumer of Power as they continue to move customers to Power on IBM Cloud. https://www.ibm.com/cloud/power-virtual-server https://www.ibm.com/cloud/power-virtual-server
  - 908B64B197 5y ago
    Other than legacy software, is there a reason to use Power at all?
    - blodkorv 5y ago
      As of now Intel/AMD will always be cheaper for the performance you get. So it guess legacy is the only logical reason. In some benchmarks power is faster but instead of spending the extra money on power you can just buy more intel/AMD cpus and not bother with making sure your software work on power.
hi41 5y ago
With all the over-the-top sensationalized news reports, I did not hear an understated humor in a long time and then I saw this in the article! Nice one! >>IBM states that the technology can fit ’50 billion transistors onto a chip the size of a fingernail’. We reached out to IBM to ask for clarification on what the size of a fingernail was, given that internally we were coming up with numbers from 50 square millimeters to 250 square millimeters.
- FridayoLeary 5y ago
  The author seems to be a Professor in Oxford. I took the trouble to look up because i (correctly) guessed this was typical, dry British irony. The academic link also came as no surprise.
  - throwaway2037 5y ago
    To be clear, according to his LinkedIn profile (https://www.linkedin.com/in/iancutress https://www.linkedin.com/in/iancutress): <<Academically I have obtained a doctorate degree (DPhil, aka PhD) from the University of Oxford>> It does not say he is/was a professor. (Please correct me if wrong.) Still, a PhD from Oxford is an amazing achievement! And, yes, I also enjoyed that bone-dry humor about enquiry about size of fingernail...
    - IanCutress 5y ago
      Can confirm, not a professor :) Nine papers on Computational Chemistry during my 3 year PhD. Been writing about semiconductors for 10+ years now. Also doing video on the youtubes. https://www.youtube.com/techtechpotato https://www.youtube.com/techtechpotato
      - secfirstmd 5y ago
        Hahaha. That's some achievement and perfectly timed response. https://youtu.be/_uMEE7eaaUA https://youtu.be/_uMEE7eaaUA
      - 5y ago
rasputnik6502 5y ago
...but it's too small to be seen.
ksec 5y ago
It really depends when this will arrive ( if at all ) at Samsung Foundry. TSMC will have 3nm shipping next year. And currently still looking at 2024 for their 2nm. Which would have 50% higher transistor density than this IBM 2nm. And I really do support Intel's node renaming if the rumour were true. I am sick and tired of people arguing over it. It is wrong, but that is how the industry has decided to use. Adopt it and move on.
ramshanker 5y ago
More soup for Wafer Scale Engine 3.
IanCutress 5y ago
I'm the author of the article, but I've also made a video on the topic. Covers the same topic, but some people like video better than written. Also includes a small segment of a relevant Jim Keller talk on the topic of EUV. https://www.youtube.com/watch?v=DZ0yfEnwipo https://www.youtube.com/watch?v=DZ0yfEnwipo
- phkahler 5y ago
  I thought with EUV they could drop multi-patterning for 7nm and maybe another node or two. Do you have info on weather each company is doing double or quad patterning on any of these nodes? That has a big impact on the cost of a chip and I would think yield as well.
  - IanCutress 5y ago
    IBM said they're still doing single patterning EUV on 2nm.
    - ksec 5y ago
      Thanks Dr. Did they mentioned how many layers? I remember TSMC was aiming at something close to 30 for their 3nm. And it is a little strange how IBM decide to name it 2nm when it is much closer to 3nm.
      - IanCutress 5y ago
        I asked that exact question, they did not answer.
marsven_422 5y ago
IBM still have competent engineers...looks like IBM HR department has failed.
taklamunda 5y ago
Brand name is so nice hope the quality is better then brand.
ChuckMcM 5y ago
This is an amazing step and the transistor density chart shows you just how big a deal this is. 1/3B transistors per square mm. Now for 'grins' take a piece of paper and make a 2 x 2 mm square on it. Now figure out what you can do with 1.3B transistors in that space. Based on this[1] you are looking at a quad-core w/GPU desktop processor. Of course you aren't really because you cant fit the 1440 pins that processor needs to talk to the outside world. But it suggests to me that at some point we'll see these things in "sockets" that connect via laser + WDM to provide the I/O. An octagonal device with 8 laser channels off each of the facets would be kind of cool. Power and ground take offs on the top and bottom. That would be some serious sci-fi shit would it not? [1] https://en.wikipedia.org/wiki/Transistor_count https://en.wikipedia.org/wiki/Transistor_count
- anigbrowl 5y ago
  I suspect over the next decade we'll see architectural changes and a whole host of liberating form factors where relatively modest processing power is sufficient to provide huge utility, from eyeglasses to earrings, to implants of various sorts. Also we're already at the point of being able to do some serious processing in a pill that's small enough to digest and excrete safely. Near-real-time chemical assay can't be that far off.
  - eric__cartman 5y ago
    That makes a lot of sense. Computers nowadays have gotten so fast that in many use cases the performance is more than enough while heat/power constraints are still an issue. This could open up the possibility to embed chips in many crazy contraptions.
    - loop0 5y ago
      But at the same time software got slower and slower to the point that every processor upgrade just feels the same as the previous one. Sure there are some speedups, but I feel software could be way faster than it is today. There is little reason for a command line only linux to be slow in an older machine, and yet it is slugish.
galaxyLogic 5y ago
Plenty of room. At the bottom
anigbrowl 5y ago
Heh, I remember being roundly mocked here about 10 years ago for disputing the idea that 22nm was the end of the road. 'Maybe 16 or 14nm, but then the laws of physics intervene.' I should have put down a bet.
piinbinary 5y ago
It sounds like we are O(single digit) years away from a rackmount server containing a trillion transistors. Napkin math: 50b transistors/chiplet x 6 chiplets/socket x 4 socket/motherboard = 1200b transistors/motherboard
- osamagirl69 5y ago
  You can already get a single rackmount server with over a trillion transistors. For example, the CS-2 [1] has 2.6T transistors (on a single die no less!) in 15u. If you are willing to count the transistors in your dram (dram has one transistor per bit), then you can already get over 35T transistors (32x 128GB ECC DIMMs with 1.2T transistors per DIMM) per 1RU, or over a quadrillion transistors per rack. [1] https://cerebras.net/product/ https://cerebras.net/product/
anshumankmr 5y ago
Is PowerPC now going to show up in laptops?
LdSGSgvupDV 5y ago
It makes me recall the UMC who had trusted IBM.
iamthemonster 5y ago
In case it is difficult to picture what 2nm is like, this page has the dimensions of the silicon crystal lattice, which is 0.5nm across: https://www.princeton.edu/~maelabs/mae324/glos324/silicon.htm#:~:text=The%20electronic%20configuration%20of%20the,neighbor%20distance%20is%200.235%20nm https://www.princeton.edu/~maelabs/mae324/glos324/silicon.ht....
ngcc_hk 5y ago
If look at the table is intel actually not that bad in terms of density?
deleted 5y ago
[deleted]
Woodi 5y ago
Practically ? News from last few years says: it's vaporware. Every few years we hear "IBM made actually-smallest node" and what ? Just x86 cabal keep trashing our lives. It's possible IBM is making CPUs for secret govs projects. But if not then all that "IBM made x node" is fraud news. Or something other that change f* nothing. Just scary potential fab builders.

579 points by 0-_-0 5y ago

thombles 5y ago

I'm glad we have an industry standard for fingernail size at least.

danmur 5y ago
Haha, that was my favourite part. Wish they'd followed up by asking which fingernail and whose, when they last cut it etc.
guidopallemans 5y ago
That must be equal to 1cm^2, right? I guess you could cheat and use the area of a thumb nail, but then you could take it a step further and use the area of a horse's fingernail, which is at least 100 times larger...
- mminer237 5y ago
  IBM used ~1.2cm^2 (150mm^2)

bullen 5y ago

I'm curious what the longevity at 100% will look like for these. Also peak performance is allready passed even with multicore because of RAM latency. I still think 14nm or larger will be coming out on top after a few decades of intense use. Time will tell!

formerly_proven 5y ago
> Also peak performance is allready passed even with multicore because of RAM latency. By that logic CPUs from today should be slower than those from 2005, since the real (uncached) memory latency has increased (significantly) for most systems. Though I suppose this means you could actually engineer workloads that run slower on a modern 5 GHz CPU than on a 2005-era Athlon 64.
- erk__ 5y ago
  IBM already have a chip with a gigabyte of L3 cache, so maybe that combats the latency in another way
  - formerly_proven 5y ago
    Reducing average memory read/write latency (as well as increasing bandwidth) is the point of big caches - but, cet. par. bigger caches inherently have higher lookup latency, deeper cache hierarchies increase the latency further and cache sizes are also limited by ISA concerns (4K pages on x86 limit the size of VIPT caches). So a system with a deep cache hierarchy and large caches will perform better on average, but actually going out there and getting bits from main memory will take longer. Not least because the actual, physical latency of DRAM itself improves only very, very slowly, this makes old systems stand up quite well in this particular metric against modern systems.
vardump 5y ago
> I'm curious what the longevity at 100% will look like for these. Indeed. At this feature size I'd already start to be worried how long the chip will work.
- MayeulC 5y ago
  Feature size seems to be 15nm, from the article. 2nm is marketing speech for transistor density.

jbverschoor 5y ago

That should also mean that the price per chip will decrease, because you can fit more on a single wafer

Guthur 5y ago
Not necessarily, and most likely no. The cost of craming so much in to such a small is not linear it's been getting more and more expensive. There are also factors like yield that come into play and potentially drive the costs up again.
whoknowswhat11 5y ago
Absolutely not - these will be by far the most expensive process nodes. 28nm probably where you want to be for cost - check out what raspberry pi and other lower cost products use
- akmittal 5y ago
  I don't think it would be that much cheaper to make 28nm now. 2-3 generations behind mainstream should be cheapest. PI 4 was launched around 2 years back. So if PI5 is launched today they will mist probably go for 12nm.
  - whoknowswhat11 5y ago
    Depends on volume. Tape out / design / validation / mask costs and other nonrecurring costs get high or very low based on node size. For Apple volume latest and later nodes may be cheapest per unit performance. Most folks aren't Apple
  - 0-_-0 5y ago
    According to this, 28 nm is indeed the cheapest: http://www.monolithic3d.com/blog/moores-law-did-indeed-stop-at-28nm http://www.monolithic3d.com/blog/moores-law-did-indeed-stop-...
    - akmittal 5y ago

birdyrooster 5y ago

Can IBM scale this production up themselves?

piokoch 5y ago
Rather not, they are not in the business of mass production of this kind of chips. They don't need, probably they will own a few really hot patents (and they deserve them). The article mention they will team up with Samsung and Intel. If Intel managed to produce have that chip at scale this would really helped them, given the fact they are behind Apple/TCMS and AMD.
- bogwog 5y ago
  > The article mention they will team up with Samsung and Intel. Wouldn't an Intel partnership be bad for their entire Power 9 business? I'm not very familiar with Power 9, but as I understand it's marketed as an alternative to x86 in the server/cloud hardware. This advancement along with Intel's stagnation could be a good opportunity for IBM to gain more market share there. Maybe Power 9 workstations will even become a thing most people can afford.
  - salmo 5y ago
    Power9 is actually made at GlobalFoundries. And it's mostly just in (fading) IBM i systems and one-off super computers. Power 10 is supposedly on the horizon. There's a handful of niche workstations, and "a partnership" with Google/Rackspace, but I can't even see how to get one of those via GCP or Rackspace. It's an interesting chip, and I'm a big fan of CPU diversity, but Power's time has come and gone. It's really only supported internally at this point: IBM i, AIX, RedHat, with Debian and (Open|Free)BSD as the outliers. We'll just have ARM and RISC-V as non-x86 "real" CPUs, I guess.
    - spijdar 5y ago
      I think you're underselling it a bit. It's supported on RHEL, SUSE, Fedora, Debian, Ubuntu, several more niche distros besides, but aren't those the dominant OSes outside Windows (for servers/workstations)? Unless I'm misinterpreting the meaning of "outliers". And support goes out pretty far. Just to rattle some examples of public "support" for power8/9, Anaconda lists power9 binaries under x86 for their installer (no mention of ARM), PyPy has Power support, V8 has Power support (the basis for Power ports of Chromium w/JIT'd javascript), nvidia has Power drivers/CUDA runtimes on their main download portal. I'm not trying to paint it as largely supported or even a great platform, but I think it might now be better supported than it ever has been. It's little-endian now, software compatibility is almost 100% outside of JIT'd things (and many JIT'd things have Power ports). If/when it fails or fades away, it'll be because it wasn't good enough to displace the alternatives, rather than because no one supported it or it was too difficult to use/support.

tromp 5y ago

The table in the article suggests to me that instead of this fictional "feature size", we could use the achievable transistor area as a more meaningful measure of process scale. IBM achieved 50B transistors in 150mm^2, for a per-transistor area of 3000 nm^2. TSMC's 5nm process (used by Apple's M1 chip) apparently achieves a transistor area of 5837 nm^2, while Intel's 10nm is lagging at roughly 10000 nm^2.

iamgopal 5y ago
Shouldn’t we need to use volume instead of area ?
- tromp 5y ago
  I think cooling requirements will keep use of the 3rd dimension severely limited in the foreseeable future. Also, the required number of lithographic steps might make it economically infeasible.
  - londons_explore 5y ago
    NAND manages 100+ stacked transistors. Things like processor caches have similarly low average switching rates, so it doesn't seem out of the realm of possibility to see use of the third dimension for logic.
    - selectodude 5y ago
      NAND isn’t ever all being used at the same time and even then it can get very hot. SSD thermal throttling is a genuine issue.
      - xxs 5y ago
        SSD thermal throttle the controller =not= the NAND, itself... which actually doesn't even like to be cold.

akmittal 5y ago

Hopefully after this next Raspberry pi will finally have a 7nm chip

0-_-0 5y ago
I'm thinking the extra production capacity that needs to be put in to handle the current chip shortage must get freed up sometime, which should mean more than the expected excess 7nm capacity a few years down the line...

chipzillazilla 5y ago

Do these IBM 2nm chips have an actual function? Just curious what they actually do.

enkid 5y ago
They do the same things the bigger chips do faster and with less power.
- mrweasel 5y ago
  I don't think that was the question, not that you're wrong. The question might be more the same one I had: Are they actually making a 2nm POWER processor, or is this just some basic chip that shows that the process works?
  - IanCutress 5y ago
    Basic chip trying lots of different things with the manufacturing technology to profile them/see how they work. It's a proof of concept.
daniel-thompson 5y ago
From TFA: > No details on the 2nm test chip have been provided, although at this stage it is likely to be a simplified SRAM test vehicle with a little logic. The 12-inch wafer images showcase a variety of different light diffractions, which likely points to a variety of test cases to affirm the viability of the technology. IBM says that the test design uses a multi-Vt scheme for high-performance and high-efficiency application demonstrations.
- BlueTemplar 5y ago
  > a variety of different light diffractions So, their function is that they look really cool ? Yes, yes, I'm leaving...

PicassoCTs 5y ago

Moore to the rescue. But can they keep up with the bloatware curve? If we cook all the horsepower down to glue, and glue ever more horrible libraries together, when will we reach peak horse-pisa-stack? I stopped eyeing for cpu advances a decade ago. If we could have a NN-driven prefetcher that is able to anticipate cache misses from instructions and data, 300 cycles ahead of time, that would be some speedup we all could benefit from, if it found its way into hardware. https://drive.google.com/file/d/17THn_qNQJTH0ewRvDukllRAKSFgEI9mm/view https://drive.google.com/file/d/17THn_qNQJTH0ewRvDukllRAKSFg...

simias 5y ago
I think it's the glue that keeps up with the CPU power curve, so to speak. You give devs more RAM and more cycles and they'll find a way to use them with inefficient languages, suboptimal code and shiny UI. I think it's important to remember that for instance Zelda: Link's Awakening was less than 512KiB in size and ran on a primitive 1MHz CPU. But at the same time we have to acknowledge how better it can be to develop for a modern target. We can decide to waste this potential with bloated electron runtimes, but we can also leverage it to make things we thought impossible before.
- enkid 5y ago
  I don't think this is a good example. Zelda: Link's Awakening, while ground breaking, can be, and has been improved upon. Using those resources to create a better user experience is not inefficiency. That's the entire point of a video game - a good user experience.
  - dijit 5y ago
    I think you're not disagreeing with the parent. You can have an exceptional experience with a game in less than the storage and processing power it takes to run Hello World today; To that end you can make things better and nicer than Links Awakening with modern resources. But can you make something 500-3000x better? (that's the order of magnitude we're talking about, with Slack vs Zelda)

mlacks 5y ago

not much experience in this space: who would use this patent? I see Samsung and Intel as partners; do they simply use IBMs research with their own manufacturing to produce this? Also curious if this development will affect apple silicon or TSMCs bottom line in the near future

dahfizz 5y ago
PowerPC in general is somewhat niche. Its used in things from networking switches to fighter jets, but nothing that would affect mainstream CPU market. I can't imagine Apple jumping to a new architecture after just developing their own ARM chips.

andy_ppp 5y ago

Interesting table showing millions of transistors per mm^2 there. Is Intel’s 10nm really having more transistor density that TSMC’s 7nm? This could mean some big things coming from AMD moving to 5nm next year!

xxs 5y ago
yes, intel 10nm is similar to tsmc's 7mn. Unfortunately for Intel they have struggled to produce any non-low-powered chips on 10nm. That can be alleviated by not cramming the entire area with transistors. Overall the numbers of "X" nm mean very little
- colinmhayes 5y ago
  Intel 10nm desktop is releasing this fall.
  - xxs 5y ago
    > Intel 10nm desktop is releasing this fall. Hence, "Intel they have struggled". For 5years. We still don't know how it's going to turn out.
ksec 5y ago
And and it has been stated gazillion times, except most media doesn't like to report it. Which leads to discussion that goes no where.

slver 5y ago

I'm still waiting for this new persistent memory IBM had. But anyway, I'm happy to see this density is even possible. Exciting times ahead.

blodkorv 5y ago

How big is IBMs chip manufacturing? Power seems to be more and more out of fashion and other chips seems to preform way better. They cant be making much of those?

agumonkey 5y ago
Maybe with the relocalization of fabs they will have an opportunity to grow that side again.
ilogik 5y ago
if only there were a handy article on anandtech, linked to on HN that could answer this question
jhickok 5y ago
IBM still makes a lot of money on Power, but at the moment it is a managed decline. Ever refresh cycle they get a nice big revenue bump, and they have a pretty large Fortune 500/US Defense base that won't be leaving Power any time soon. Soon IBM will be the biggest consumer of Power as they continue to move customers to Power on IBM Cloud. https://www.ibm.com/cloud/power-virtual-server https://www.ibm.com/cloud/power-virtual-server
- 908B64B197 5y ago
  Other than legacy software, is there a reason to use Power at all?
  - blodkorv 5y ago
    As of now Intel/AMD will always be cheaper for the performance you get. So it guess legacy is the only logical reason. In some benchmarks power is faster but instead of spending the extra money on power you can just buy more intel/AMD cpus and not bother with making sure your software work on power.

hi41 5y ago

With all the over-the-top sensationalized news reports, I did not hear an understated humor in a long time and then I saw this in the article! Nice one! >>IBM states that the technology can fit ’50 billion transistors onto a chip the size of a fingernail’. We reached out to IBM to ask for clarification on what the size of a fingernail was, given that internally we were coming up with numbers from 50 square millimeters to 250 square millimeters.

FridayoLeary 5y ago
The author seems to be a Professor in Oxford. I took the trouble to look up because i (correctly) guessed this was typical, dry British irony. The academic link also came as no surprise.
- throwaway2037 5y ago
  To be clear, according to his LinkedIn profile (https://www.linkedin.com/in/iancutress https://www.linkedin.com/in/iancutress): <<Academically I have obtained a doctorate degree (DPhil, aka PhD) from the University of Oxford>> It does not say he is/was a professor. (Please correct me if wrong.) Still, a PhD from Oxford is an amazing achievement! And, yes, I also enjoyed that bone-dry humor about enquiry about size of fingernail...
  - IanCutress 5y ago
    Can confirm, not a professor :) Nine papers on Computational Chemistry during my 3 year PhD. Been writing about semiconductors for 10+ years now. Also doing video on the youtubes. https://www.youtube.com/techtechpotato https://www.youtube.com/techtechpotato
    - secfirstmd 5y ago
      Hahaha. That's some achievement and perfectly timed response. https://youtu.be/_uMEE7eaaUA https://youtu.be/_uMEE7eaaUA
    - 5y ago

rasputnik6502 5y ago

...but it's too small to be seen.

ksec 5y ago

It really depends when this will arrive ( if at all ) at Samsung Foundry. TSMC will have 3nm shipping next year. And currently still looking at 2024 for their 2nm. Which would have 50% higher transistor density than this IBM 2nm. And I really do support Intel's node renaming if the rumour were true. I am sick and tired of people arguing over it. It is wrong, but that is how the industry has decided to use. Adopt it and move on.

ramshanker 5y ago

More soup for Wafer Scale Engine 3.

IanCutress 5y ago

I'm the author of the article, but I've also made a video on the topic. Covers the same topic, but some people like video better than written. Also includes a small segment of a relevant Jim Keller talk on the topic of EUV. https://www.youtube.com/watch?v=DZ0yfEnwipo https://www.youtube.com/watch?v=DZ0yfEnwipo

phkahler 5y ago
I thought with EUV they could drop multi-patterning for 7nm and maybe another node or two. Do you have info on weather each company is doing double or quad patterning on any of these nodes? That has a big impact on the cost of a chip and I would think yield as well.
- IanCutress 5y ago
  IBM said they're still doing single patterning EUV on 2nm.
  - ksec 5y ago
    Thanks Dr. Did they mentioned how many layers? I remember TSMC was aiming at something close to 30 for their 3nm. And it is a little strange how IBM decide to name it 2nm when it is much closer to 3nm.
    - IanCutress 5y ago
      I asked that exact question, they did not answer.

marsven_422 5y ago

IBM still have competent engineers...looks like IBM HR department has failed.

taklamunda 5y ago

Brand name is so nice hope the quality is better then brand.

ChuckMcM 5y ago

This is an amazing step and the transistor density chart shows you just how big a deal this is. 1/3B transistors per square mm. Now for 'grins' take a piece of paper and make a 2 x 2 mm square on it. Now figure out what you can do with 1.3B transistors in that space. Based on this[1] you are looking at a quad-core w/GPU desktop processor. Of course you aren't really because you cant fit the 1440 pins that processor needs to talk to the outside world. But it suggests to me that at some point we'll see these things in "sockets" that connect via laser + WDM to provide the I/O. An octagonal device with 8 laser channels off each of the facets would be kind of cool. Power and ground take offs on the top and bottom. That would be some serious sci-fi shit would it not? [1] https://en.wikipedia.org/wiki/Transistor_count https://en.wikipedia.org/wiki/Transistor_count

anigbrowl 5y ago
I suspect over the next decade we'll see architectural changes and a whole host of liberating form factors where relatively modest processing power is sufficient to provide huge utility, from eyeglasses to earrings, to implants of various sorts. Also we're already at the point of being able to do some serious processing in a pill that's small enough to digest and excrete safely. Near-real-time chemical assay can't be that far off.
- eric__cartman 5y ago
  That makes a lot of sense. Computers nowadays have gotten so fast that in many use cases the performance is more than enough while heat/power constraints are still an issue. This could open up the possibility to embed chips in many crazy contraptions.
  - loop0 5y ago
    But at the same time software got slower and slower to the point that every processor upgrade just feels the same as the previous one. Sure there are some speedups, but I feel software could be way faster than it is today. There is little reason for a command line only linux to be slow in an older machine, and yet it is slugish.

galaxyLogic 5y ago

Plenty of room. At the bottom

anigbrowl 5y ago

Heh, I remember being roundly mocked here about 10 years ago for disputing the idea that 22nm was the end of the road. 'Maybe 16 or 14nm, but then the laws of physics intervene.' I should have put down a bet.

piinbinary 5y ago

It sounds like we are O(single digit) years away from a rackmount server containing a trillion transistors. Napkin math: 50b transistors/chiplet x 6 chiplets/socket x 4 socket/motherboard = 1200b transistors/motherboard

osamagirl69 5y ago
You can already get a single rackmount server with over a trillion transistors. For example, the CS-2 [1] has 2.6T transistors (on a single die no less!) in 15u. If you are willing to count the transistors in your dram (dram has one transistor per bit), then you can already get over 35T transistors (32x 128GB ECC DIMMs with 1.2T transistors per DIMM) per 1RU, or over a quadrillion transistors per rack. [1] https://cerebras.net/product/ https://cerebras.net/product/

anshumankmr 5y ago

Is PowerPC now going to show up in laptops?

LdSGSgvupDV 5y ago

It makes me recall the UMC who had trusted IBM.

iamthemonster 5y ago

In case it is difficult to picture what 2nm is like, this page has the dimensions of the silicon crystal lattice, which is 0.5nm across: https://www.princeton.edu/~maelabs/mae324/glos324/silicon.htm#:~:text=The%20electronic%20configuration%20of%20the,neighbor%20distance%20is%200.235%20nm https://www.princeton.edu/~maelabs/mae324/glos324/silicon.ht....

ngcc_hk 5y ago

If look at the table is intel actually not that bad in terms of density?

deleted 5y ago

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Woodi 5y ago

Practically ? News from last few years says: it's vaporware. Every few years we hear "IBM made actually-smallest node" and what ? Just x86 cabal keep trashing our lives. It's possible IBM is making CPUs for secret govs projects. But if not then all that "IBM made x node" is fraud news. Or something other that change f* nothing. Just scary potential fab builders.