While simulation is a well-established practice among digital hardware developers, I have the impression that formal verification is still largely ignored. I ho

While simulation is a well-established practice among digital hardware developers, I have the impression that formal verification is still largely ignored. I hope it changes as free tools are emerging such as SymbiYosys https://symbiyosys.readthedocs.io https://symbiyosys.readthedocs.io While this is still a long-term goal, I am planning to experiment how formal verification can be used in Racket-based hardware tools.