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Most interesting aspect of wafer-scale manufacturing is yield. Even if we have 95% chip yield, as the chip size approaches the wafer-level dimensions, I don't k
by systemvoltage 6y ago
Most interesting aspect of wafer-scale manufacturing is yield. Even if we have 95% chip yield, as the chip size approaches the wafer-level dimensions, I don't know off top of my head what the math would be but it is going to plummet drastically. My guess is that they're handling this in the chip logic. Building resiliency by turning off cells in the wafer that didn't yield. That begs the question, how are they probing them? A probe card of the size of the wafer is unheard of. How are they running validation? Pretty mindblowing to say the least!
- belval 6y agoNot an expert in chip manufacturing but my guess is that they just disable the parts that don't work and their big numbers represent ~80% of the actual number of transistors in the wafer because they account for that manufacturing loss.
- KETpXDDzR 6y agoCorrect. You already have the same with modern CPUs and GPUs. You just disable the defect parts. Obviously, that sounds way easier than it is.
- vkazanov 6y agoDisabling parts of the chip? The secret sauce then is to make it defect-proof
- gsnedders 6y agoYup. This. From https://www.anandtech.com/show/16626/cerebras-unveils-wafer-scale-engine-two-wse2-26-trillion-transistors-100-yield https://www.anandtech.com/show/16626/cerebras-unveils-wafer-...: > Cerebras achieves 100% yield by designing a system in which any manufacturing defect can be bypassed – initially Cerebras had 1.5% extra cores to allow for defects, but we’ve since been told this was way too much as TSMC's process is so mature.
- baybal2 6y agoYep, not all semiconductor defects can be repaired, and at such scale repair circuits themselves will need to be redundant.
- imtringued 6y agoThe question is, how do you detect defective cores?
- deleted 6y ago[deleted]
- bob1029 6y agoThey probably aren't bothering to. The extreme economics for producing this type of chip are likely acceptable to the stakeholders. Also, there is no reason they cant have some redundancy throughout the design so you can fuse off bad parts. It all really depends on the nature of the anticipated vs actual defects, which is an extraordinarily deep rabbit hole to climb into.
- systemvoltage 6y agoI wonder how much this "chip" costs!
- LASR 6y agoProducts like these are often sold as part of a contract to deliver complete solutions + support + maintenance over some number of years. It's hard to estimate a per-unit cost. But suffice to say it would cost similar to other datacenter compute solutions on a performance/$ level.
- aryonoco 6y agoAccording to Anandtech, an arm + leg. Also known as several million.
- meepmorp 6y agoThe previous generation was the $2-3 million range, and these are now in the neighborhood of "several million". Or, arm+leg.
- Pet_Ant 6y agoHow does this fusing work? I assume there are a bunch of wires than are either hot or ground and that determines if part of a chip gets run?
- PeterisP 6y agoI believe you design special fuses on the chip that can be "blown" with a laser after testing and before putting the silicon in the protective packaging.
- baybal2 6y agoI bet they just probe the chip: 1. piece by piece 2. on die test circuits
- seniorivn 6y agothey exclude/disable cores with issues so an long as infrastructure parts of the chip are not affected the chip is functional
- pradn 6y agoThe first Cerebras Wafer Scale Engine used "... breakthrough techniques in cross-reticle patterning, but with the level of redundancy built into the design, ensured a yield of 100%, every time." I'm unsure what to think of this. "When we spoke to Cerebras last year, the company stated that they already had orders in the ‘strong double digits’." And they cost 2- 2.5 million each! https://www.anandtech.com/show/15838/cerebras-wafer-scale-engine-scores-a-sale-5m-buys-two-for-the-pittsburgh-supercomputing-center https://www.anandtech.com/show/15838/cerebras-wafer-scale-en...
- robocat 6y ago"the price has risen from ~$2-3 million to ‘several’ million". "The CEO Andrew Feldman tells me that as a company they are already profitable, with dozens of customers already with CS-1 deployed and a number more already trialling CS-2 remotely as they bring up the commercial systems". Quotes from https://www.anandtech.com/show/16626/cerebras-unveils-wafer-scale-engine-two-wse2-26-trillion-transistors-100-yield https://www.anandtech.com/show/16626/cerebras-unveils-wafer-...
- AnimalMuppet 6y agoSo, less than 100 orders? That doesn't blow me away. Though at 2 million or more each, that adds up to real money...
- foobiekr 6y ago200M would be great revenue in that space.
- Zardoz84 6y agoIt's the old Wafer Scale Integration again. But now shows a successful product : https://en.wikipedia.org/wiki/Wafer-scale_integration https://en.wikipedia.org/wiki/Wafer-scale_integration