3 ms·

> "the next 3 years, i.e 3nm in 2022 and 2nm in 2024" I wish the industry would standardize on using "transistors per square millimetre" as the metric for thei

> "the next 3 years, i.e 3nm in 2022 and 2nm in 2024" I wish the industry would standardize on using "transistors per square millimetre" as the metric for their node size instead of "nm".

baybal2 6y ago
Even that is not exactly the same. Cells, or logic gates per mm° is too rather ambiguous, as different implementations of same logic families do things differently, and the metric gets even wronger for different logic families. The best I believe will be a whole cell library metric using some lowest common denominator blocks like registers, adders, bus pieces etc
- keanebean86 6y ago
  I'm going to be that person and say it doesn't matter. Either you're a consumer who really only cares about a finished product's performance or you're a chip designer who has the time and money to research past the nm number. All us armchair semiconductor fabrication experts can have a good old time arguing ove who's 2nm is better. The real world will continuing doing it's thing. *I know this is hacker news and some of you might be real experts. I know nothing. Please don't feel disrespected.
  - variaga 6y ago
    You're basically right. Nobody doing actual chip design cares about process nm numbers. Process selection done right is a fairly tedious comparison of dynamic power consumption, static power consumption, achievable operating frequencies, wafer cost, SRAM density, IP availability, process maturity/yeild, fab capacity/ availability and about a dozen other factors. There will be a large-ish excel spreadsheet somewhere to do the comparison. The nm number is for press releases and non-technical investors.
    - imtringued 6y ago
      It's basically a version number.
      - variaga 6y ago
        Yes, that's a good analogy, although the nm number by itself isn't the full version e.g for 28nm alone, TSMC had 28HP, 28HPL, 28HPM, 28HPC and 28HPC+ variants, of which only HPM and HPC (but not HPC+!) are at all compatible. 28HPC+ and 28HP have very different performance, even if they're both "28nm". And if you really want to specify a process you also need to know the metal stack (lots of options there), Vt selection(s) (most processes have 2-5 options) & high-voltage device support option.
- addaon 6y ago
  Honestly, SRAM bits per square mm seems like a perfectly fine metric for me. While I recognize that the memory-to-logic density varies, sometimes significantly, between processes, (a) SRAM cells are optimized to within an inch of their lives ("within a nm of their lives"?), including often being revised in minor process updates, so accurately reflect the capabilities of the process; (b) many chips, including the ones I personally tend to be interested in (processors, etc) are SRAM-heavy, and get more so each generation; (c) it's a single number with some connection to reality, which is better than both a single number with limited connection to reality ("process"), or a whole suite of numbers that require deep interpretation (cell library metrics).
  - baybal2 6y ago
    And it is exactly because SRAM gets so intensely optimised with each generation, I did not want to list it. SRAM density, and performance is not characteristic of how the rest of logic will perform no other logic component get squeezed so much.
    - atq2119 6y ago
      Ironically, it seems random logic may have been scaling better than SRAM recently...
      - baybal2 6y ago
        Because SRAM was already squeezed to the max generations ago.
ebruchez 6y ago
I found this article on the topic really informative: https://read.nxtbook.com/ieee/spectrum/spectrum_na_august_2020/the_node_is_nonsense.html https://read.nxtbook.com/ieee/spectrum/spectrum_na_august_20...

> "the next 3 years, i.e 3nm in 2022 and 2nm in 2024" I wish the industry would standardize on using "transistors per square millimetre" as the metric for their node size instead of "nm".

baybal2 6y ago

Even that is not exactly the same. Cells, or logic gates per mm° is too rather ambiguous, as different implementations of same logic families do things differently, and the metric gets even wronger for different logic families. The best I believe will be a whole cell library metric using some lowest common denominator blocks like registers, adders, bus pieces etc

keanebean86 6y ago
I'm going to be that person and say it doesn't matter. Either you're a consumer who really only cares about a finished product's performance or you're a chip designer who has the time and money to research past the nm number. All us armchair semiconductor fabrication experts can have a good old time arguing ove who's 2nm is better. The real world will continuing doing it's thing. *I know this is hacker news and some of you might be real experts. I know nothing. Please don't feel disrespected.
- variaga 6y ago
  You're basically right. Nobody doing actual chip design cares about process nm numbers. Process selection done right is a fairly tedious comparison of dynamic power consumption, static power consumption, achievable operating frequencies, wafer cost, SRAM density, IP availability, process maturity/yeild, fab capacity/ availability and about a dozen other factors. There will be a large-ish excel spreadsheet somewhere to do the comparison. The nm number is for press releases and non-technical investors.
  - imtringued 6y ago
    It's basically a version number.
    - variaga 6y ago
      Yes, that's a good analogy, although the nm number by itself isn't the full version e.g for 28nm alone, TSMC had 28HP, 28HPL, 28HPM, 28HPC and 28HPC+ variants, of which only HPM and HPC (but not HPC+!) are at all compatible. 28HPC+ and 28HP have very different performance, even if they're both "28nm". And if you really want to specify a process you also need to know the metal stack (lots of options there), Vt selection(s) (most processes have 2-5 options) & high-voltage device support option.
addaon 6y ago
Honestly, SRAM bits per square mm seems like a perfectly fine metric for me. While I recognize that the memory-to-logic density varies, sometimes significantly, between processes, (a) SRAM cells are optimized to within an inch of their lives ("within a nm of their lives"?), including often being revised in minor process updates, so accurately reflect the capabilities of the process; (b) many chips, including the ones I personally tend to be interested in (processors, etc) are SRAM-heavy, and get more so each generation; (c) it's a single number with some connection to reality, which is better than both a single number with limited connection to reality ("process"), or a whole suite of numbers that require deep interpretation (cell library metrics).
- baybal2 6y ago
  And it is exactly because SRAM gets so intensely optimised with each generation, I did not want to list it. SRAM density, and performance is not characteristic of how the rest of logic will perform no other logic component get squeezed so much.
  - atq2119 6y ago
    Ironically, it seems random logic may have been scaling better than SRAM recently...
    - baybal2 6y ago
      Because SRAM was already squeezed to the max generations ago.

ebruchez 6y ago

I found this article on the topic really informative: https://read.nxtbook.com/ieee/spectrum/spectrum_na_august_2020/the_node_is_nonsense.html https://read.nxtbook.com/ieee/spectrum/spectrum_na_august_20...