7 ms·
Everyone's right to celebrate the success of RISC-V, but part of me thinks it's a shame that there's relatively little architectural diversity (edit I should ha
by MaxBarraclough 6y ago
Everyone's right to celebrate the success of RISC-V, but part of me thinks it's a shame that there's relatively little architectural diversity (edit I should have said ISA diversity) in modern CPUs. MIPS, Alpha, and Super-H, have all but faded away. Power/PowerPC is still out there somewhere though. Apparently they're still working on SPARC, too. [0]
At least we'll always have the PS2. ...until the last one breaks, I guess.
[0] https://en.wikipedia.org/wiki/SPARC https://en.wikipedia.org/wiki/SPARC
- xiphias2 6y agoWhat RISC-V achieves is architectural diversity over the boring mov, add, mul instructions: the interesting part is in vector and matrix manipulation, and while RISC-V is working on a great solution, it allows for other accelerators to be added.
- dralley 6y agoI'm curious if someone could explain the architectural differences between ppc64le and aarch64? I've always heard they are quite similar.
- tyingq 6y agoSince you mentioned ppc64le, there's also aarch64eb (arm64 in big endian mode). I saw that NetBSD supports it. It seems like support for other operating systems is limited mostly because of issues around booting...not the actual kernel or userland itself.
- arnd 6y agoMIPSr6, aarch64 and riscv are siblings born from MIPSr5 plus the best of other RISC architectures. ppc64le and 32-bit Arm are part of the wider family, but have some notable differences that make them slightly less RISC-like. Both include e.g. more complex condition code handling and instructions that operate on more than three registers.
- Fordec 6y agoWe need diversity for solving different problems, not for diversity sake. What problem did MIPS solve in a unique way that others didn't? Because it wasn't desktop, mobile, embedded, graphics or AI.
- bitwize 6y agoMIPS was a nice simple ISA for CE students to learn and implement. Both ARM and RISC-V have gotchas that make them more complicated. I suppose it will live on in that form, especially if the IP is opened up.
- schoen 6y agoI remember CS 61C at Berkeley used to use MIPS to teach assembly language programming and a bit about computer architecture, using the original MIPS version of Patterson and Hennessy's Computer Organization and Design. Now that book is available in both MIPS and RISC-V versions, with, I've assumed, much more effort going into the RISC-V version... I do think the simplicity of MIPS was a big plus there, including simplicity of simulating it (http://spimsimulator.sourceforge.net/ http://spimsimulator.sourceforge.net/). I suppose a lot of students may appreciate being taught on something that is or is about to be very widely used, even if it's more complicated in various ways -- and the fact that one of the textbook authors was a main RISC-V designer makes me assume that educational aspects are not at all neglected in the RISC-V world.
- saagarjha 6y agoNot entirely related, but I found MARS (http://courses.missouristate.edu/KenVollmar/MARS/ http://courses.missouristate.edu/KenVollmar/MARS/) to be much nicer to use than SPIM. More on topic, though, RISC-V seems to really be designed in a way that makes it easy to teach. This is partially why I have doubts that it can be made very performant, but the focus of a prettier design over a more practical one is probably going to help it be more accessible to students.
- yjftsjthsd-h 6y agoThrowing out diversity because you don't see any immediate benefit is a great way to not have it when a different problem does show up. I don't know about unique way, but MIPS certainly was good at embedded; there's plenty of networking gear using it.
- elihu 6y agoI wish the barriers to using new architectures were lower. For instance, suppose binaries were typically distributed in a platform-agnostic format, like LLVM intermediate representation or something equivalent. When you run your program the first time, it's compiled to native code for your architecture and cached for later use. I realize I've sort of just re-invented Javascript. But what if we just did away with native binaries entirely, except as ephemeral objects that get cached and then thrown away and regenerated when needed? It seems like this would solve a lot of problems. You could deprecate CPU instructions without worrying about breaking backwards compatibility. If a particular instruction has security or data integrity issues, just patch the compiler not to emit that instruction. As new side-channel speculation vulnerabilities are discovered, we can add compiler workarounds whenever possible. If you're a CPU architect and want to add a new instruction for a particular weird use-case, you just have to add it to your design and patch the compiler, and everyone can start using your new instruction right away, even on old software. You'd be able to trust that your old software would at least be compatible with future instruction architectures. Processors would be able to compete directly with each other without regard to vendor-lock-in.
- Ericson2314 6y agoCome to Nix and Nixpkgs, where we can cross compile most things in myriad ways. I think the barriers to new hardware ISAs on the software side have never been lower. Even if we get an ARM RISC-V monoculture, at least we are getting diverse co-processors again, which present the same portability challenges/opportunities in a different guise.
- dataangel 6y ago> For instance, suppose binaries were typically distributed in a platform-agnostic format, like LLVM intermediate representation or something equivalent. The Mill does something like this, but only for their own chips. "Binaries" are bitcode that's not specialized to any particular Mill CPU, and get run through the "specializer" which knows the real belt width and other properties to make a final CPU-specific version.
- brucehoult 6y ago
- spamizbad 6y agoI feel like MIPS and RISC-V are so closely related they're not terribly diverse. Academic MIPS evolved into RISC-V.
- Taniwha 6y agoNope - they have different competing heritages - in this case the headline is "Berkeley beats Stanford" https://www.youtube.com/watch?v=09kPcg8Hehg https://www.youtube.com/watch?v=09kPcg8Hehg
- monocasa 6y agoAcademic RISC was designed by Patterson and Hennessy. Hennessy went off and was one of the founders of MIPS, Patterson is one of the instrumental leaders in the RISC-V space.
- brucehoult 6y agoPatterson and Hennessy were in competition with each other, at different universities. It's only much later they wrote text books together. Patterson says RISC-V is derived from RISC-I and RISC-II. I think this doesn't really old water -- at least no more so than any other RISC. RISC-I and RISC-II had condition codes and register windows, like SPARC. RISC-V doesn't have either, like MIPS. The RISC-V assembly language is also very similar to MIPS. RISC-II had both 16 and 32 bit opcodes (as did IBM 801, and Cray designs) and RISC-V has inherited this (but also following the great success of ARM Thumb2).
- guerrilla 6y agoNice that there's both MIPS and RISC-V versions of the book: https://www.amazon.com/Computer-Organization-Design-MIPS-Architecture/dp/0124077269 https://www.amazon.com/Computer-Organization-Design-MIPS-Arc... https://www.amazon.com/Computer-Organization-Design-RISC-V-Architecture/dp/0128203315/ https://www.amazon.com/Computer-Organization-Design-RISC-V-A... I guess as of today we know which one to get.
- cptskippy 6y ago> part of me thinks it's a shame that there's relatively little architectural diversity Perhaps CPU diversity is in decline but it seems to me that the industry as a whole is moving towards more diversity. It's gotten significantly cheaper to roll your own chips to the point that we've seen entirely new processors emerging (e.g. GPUs, TPUs, etc) and becoming commonplace if not essential. Isn't the point of RISC-V that the CPU is simple and augmented or complimented by any number of custom co-processors? If this is the general tend in the industry then the CPU itself might become a commodity part to be easily swapped out as something better emerges. Particularly if it can be abstracted away from the ISA.
- ksec 6y ago>Power/PowerPC is still out there somewhere though. https://openpowerfoundation.org https://openpowerfoundation.org https://github.com/antonblanchard/microwatt https://github.com/antonblanchard/microwatt Unfortunately it isn't gaining any traction. From a Long term Cost perspective it is actually cheaper choosing ARM even if OpenPOWER is free. And ARM is already inexpensive.
- phendrenad2 6y agoThere isn't much diversity in software, why hardware? Maybe standardization is a strength.
- MaxBarraclough 6y agoThere's a lot of diversity in software. Windows is quite different from GNU/Linux, for instance. There's quite a lot of diversity in the major programming languages. If you want something really different, whether in operating systems or programming languages, you have it. KolibriOS and Haskell, say.
- pabs3 6y agoI hear the RPi has nine different processor clusters, each with their own ISA.