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Nyuzi – An Experimental Open-Source FPGA GPGPU Processor

peter_d_sherman 6y ago
Related: Ben Eater - Let’s build a video card! https://eater.net/vga https://eater.net/vga Embedded Thoughts Blog - Driving a VGA Monitor Using an FPGA https://embeddedthoughts.com/2016/07/29/driving-a-vga-monitor-using-an-fpga/ https://embeddedthoughts.com/2016/07/29/driving-a-vga-monito... Ken Shirriff - Using an FPGA to generate raw VGA video:FizzBuzz with animation http://www.righto.com/2018/04/fizzbuzz-hard-way-generating-vga-video.html http://www.righto.com/2018/04/fizzbuzz-hard-way-generating-v... Clifford Wolf - SimpleVOut -- A Simple FPGA Core for Creating VGA/DVI/HDMI/OpenLDI Signals https://github.com/cliffordwolf/SimpleVOut https://github.com/cliffordwolf/SimpleVOut PDS: Also, this looks interesting, from SimpleVOut: >"svo_vdma.v A video DMA controller. Has a read-only AXI4 master interface to access the video memory."
- fortran77 6y ago
  Yeah, but these people aren't doing GPGPU computation
  - phendrenad2 6y ago
    Or even anything resembling even 2D graphics acceleration.
marcodiego 6y ago
There's people keeping OpenVGA alive[1]. With the failure of the open grahics project[2] is there any known promising projects besides libregpu[3]? [1] https://github.com/elec-otago/openvga https://github.com/elec-otago/openvga [2] https://en.wikipedia.org/wiki/Open_Graphics_Project https://en.wikipedia.org/wiki/Open_Graphics_Project [3] https://libre-soc.org/3d_gpu/ https://libre-soc.org/3d_gpu/
- phkahler 6y ago
  >> is there any known promising projects besides libregpu? I think the most useful thing right now would be a high quality version of the "easy" parts of a GPU. Basic scan out, possibly overlays, color space conversion, buffer handling. This would allow ANY open processor projects to have frame buffer graphics and run LLVMpipe for basic rendering and desktop compositing. This may be slow, but it is required for every open GPU project, while a SoC can live without the actual GPU for some applications. IMHO, first thing first.
  - marcodiego 6y ago
    Yeah. I also miss the small but firm steps approach.
    - lkcl 6y ago
      this is what we're doing in Libre-SOC, and using standard python software engineering practices (writing unit tests at every step of the way) to do it. some of those unit tests are actually Formal Correctness Proofs (asserts, but for hardware). i was stunned to find that in the hardware world, test-driven development is not standard practice: people simply haven't been trained that way. they write thousands to tens of thousands of lines of unverified code and finally do an integration test.
  - lkcl 6y ago
    this is easy to chuck together in a few days, literally, from pre-existing components found on the internet. * litex (choose any one of the available cores) * richard herveille's excellent rgb_ttl / VGA HDL https://github.com/RoaLogic/vga_lcd https://github.com/RoaLogic/vga_lcd * some sort of "sprite" graphics would do https://hackaday.com/2014/08/15/sprite-graphics-accelerator-on-an-fpga/ https://hackaday.com/2014/08/15/sprite-graphics-accelerator-... the real question is: would anyone bother to give you the money to make such a project, and the question before that is: can you tell a sufficiently compelling story to get customers - real customers with money - to write you a Letter of Intent that you can show to investors? if the answer to either of those questions is "no" then, with many apologies for pointing this out, it's a waste of your time unless you happen to have some other reason for doing the work - basically one with zero expectation up-front of turning it into a successful commercial product. now, here's the thing: even if you were successful in that effort, it's so trivial (Richard Herveille's RGB/TTL HDL sits as a peripheral on the Wishbone Bus) that it's like... why are you doing this again? the real effort is the 3D part - Vulkan compliance, Texture Opcodes, Vulkan Image format conversion opcodes (YUV2RGB, 8888 to 1555 etc. etc.), SIN/COS/ATAN2, Dot Product, Cross Product, Vector Normalisation, Z-Buffers and so on.
kleiba 6y ago
I'm a total lay person here, but my understanding is that designing a new processor is very challenging these days because of the patent situation. That is, so much in hardware design is patented that you're bound to run into problems if you don't know what you're doing. Is this true, and is it of relevance here?
- ChuckNorris89 6y ago
  Not sure of how relevant it is here, but yes, GPUs architectures are bound by tons of patents so you can bet your a$$ that if you were to commercially launch your own GPU IP, you'll have Nvidia's and AMD's lawyers knocking on your door in under 10 seconds. IIRC most companies out there selling GPU IP are still paying royalties to AMD for their patents on shader architecture which they got from their acquisition of ATI which in turn came from their acquisition of ArtX which was founded by people who worked at the long defunct SGI (Silicon Graphics). The funny thing is, if you backtrack through all GPU innovations, most stem from former SGI employees. When 3Dfx went under, even though Nvidia's GPU tech was already superior to anything 3Dfx had, Nvidia immediately swept in and picked their carcass clean, mostly for their patents in this space, so they would have more ammo/leverage against competitors going forward. Regardless how you feel about patents, with their pros and cons, hardware engineering is a capital intensive business and without patents to protect your expensive R&D, it wouldn't be a viable business.
  - joshspankit 6y ago
    To clarify what I think is the relevance, as well as to explore my own questions: If someone were to clean-room design their own GPU chip, how likely is it that Nvidia and AMD would come down on them anyway simply by virtue of the fact that they (presumably) have patents on everything that you could think of putting in that chip? In essence: do you now have to be an expert in what you’re not allowed to put in before you even start?
    - ChuckNorris89 6y ago
      To clarify further, Nvidia and AMD (and probably other small players like ARM, Quallcomm, Imagination) own the patents on core shader tech, which are the building blocks of any modern GPU design. If you want to design a GPU IP that works around all their patents, you probably can, but unless you're a John Carmack x10, your resulting design would be horribly inefficient and not competitive enough to be worth the expensive silicon it will be etched on and probably not compatible to any modern API like Vulcan or DirectX. But if you just want to build your own meme GPU for education/shits and giggles, that doesn't follow any patents or APIs, then you can and some people already did: https://www.youtube.com/watch?v=l7rce6IQDWs https://www.youtube.com/watch?v=l7rce6IQDWs
antman 6y ago
Layman here! I see a lot of posts on that subject lately so I need to ask: Can someone design a RAM chip?
- detaro 6y ago
  What do you mean specifically by "design a RAM chip"? (obviously RAM chips that you can buy are designed before they are made, so that's probably not what you are after?) FPGAs typically do contain dedicated RAM areas, because implementing it out of FPGA logic slices is terribly inefficient.
  - tcherasaro 6y ago
    FPGA designer here. Just wanted to point out that “efficiency” is highly context sensitive in FPGA design. Everything is an area / speed / power trade-off. If you only need a ram that is 8-bits wide and 64 words deep then it might be way inefficient to waste a dedicated 18kbit block ram on it when it would fit better into 2 LUTs. This is why Xilinx, for one, provides pragma such as RAM_STYLE to help guide synthesis: (* ram_style = "distributed" *) reg [data_size-1:0] myram [2**addr_size-1:0]; block: Instructs the tool to infer RAMB type components. distributed: Instructs the tool to infer the LUT RAMs. registers: Instructs the tool to infer registers instead of RAMs. ultra: Instructs the tool to use the UltraScale+TM URAM primitives. See: https://www.xilinx.com/support/documentation/sw_manuals/xilinx2019_2/ug901-vivado-synthesis.pdf https://www.xilinx.com/support/documentation/sw_manuals/xili... edit: formatting*
    - M277 6y ago
      Hey there, sorry for going off topic, but as a FPGA designer, are there any learning resources you would particularly recommend for someone starting with FPGAs by themselves? With the goal of learning more about computer architecture and the way CPUs work on a lower level.
      - tcherasaro 6y ago
        Not off the top of my head. I would definitely recommend trying to find a mentor with current experience rather than getting started by yourself if possible depending on your background. The last time I mentored someone and looked at beginner resources was over 10 years ago and at that time I was recommending beginners with at least some of the requisite college coursework buy and read "The Design Warriors Guide to FPGAs" to get started and then buy and use at least one of Peter J. Ashenden VHDL and Verilog texts as HDL language references. Much of The Design Warriors Guide might still be relevant but I haven't looked at in a while. Ashenden's books are probably still mostly relevant for the versions of the languages they covered, but these days I would try to also find a good book on SystemVerilog. All that is probably overkill towards the goal of learning more about computer architecture and the way CPUs work on a lower level though. For me I found all my undergraduate and graduate coursework, including a class on operating systems, to be essential to my understanding and real world use.
FPGAhacker 6y ago
One of the things that interests me (of many), is the use of cmake. Does anyone have good references on extending cmake to new tools that don’t produce executables per se, or otherwise work in non traditional ways?
code-scope 6y ago
Very Cool project: Love GPGPU, I git clone it and try to understand the code better here: https://www.code-scope.com/s/s/u#c=sd&uh=0f2c2fa280a2&h=afe7a329&di=-1&i=38 It looks like 5 stages FP (FP32?) pipe lines, NUM_VECTOR_LANES =16 NUM_REGISTERS=32 Are you writing your own kernel from scratch? If so which CPU does it runs on - some embedded CPU inside FPGA? In the mandelbrot.c code, it has following: #define vector_mixi __builtin_nyuzi_vector_mixi How does it get translate to vector operations in FPGA? Where is the code implement the __builtin_*? Thanks a lot an very interesting project.
ourlordcaffeine 6y ago
Are there open source opencl to FPGA compilers? If you're playing with FPGA's, you might as well directly compile the kernel into a circuit, rather than building a gpu on an FPGA and running your kernel on that. Proprietary solutions like Altera OpenCL compiler exist.
peter_d_sherman 6y ago
A guide for the impatient: GPU = CPU, but one that is placed specifically on the graphics card, and one that may specifically be optimized to perform instructions related to 3D calculations faster than other instructions. As far as the 3D stuff, don't think "3D", instead think Math specifically related to 3D. OK, so what is that Math? Well, we could consult Stack Overflow for that: https://stackoverflow.com/questions/1320403/math-used-in-3d-game-engine-programming https://stackoverflow.com/questions/1320403/math-used-in-3d-... OK, so next question, what does a GPU do then? Well, remember that a CPU can run any generalized algorithmic computations -- including those required for 3D graphics(!) (they are Turing-Complete, after all!), but the thing is, 3D graphics cards have their GPU's, er, CPU's, er, GPU's -- specifically optimized in various different ways (parallelism, specific instruction types, etc.) for the mathematics of 3D. So you see, what is being searched for is as follows: The fastest CPU, er, GPU, er CPU, that can be created on an FPGA, that can be optimized for specific 3D MATH operations, that can be created patent-free. Now, here's the thing... In Mathematics, TMTOWTDI (There's more than one way to do it) -- is King. While some math algorithms (side philosophical question to self, "How does anyone patent MATH?". No really, how do they do it? That idea is utterly mind boggling and self-contradictory! It's like what the Principal said to Billy Madison: "Mr. Madison, what you've just said is one of the most insanely idiotic things I have ever heard. At no point in your rambling, incoherent response were you even close to anything that could be considered a rational thought. Everyone in this room is now dumber for having listened to it. I award you no points, and may God have mercy on your soul."), while some math algorithms implemented in hardware are patented (and possibly still under patent) -- there are many others that are not! In other words, there are other ways to get the job done... Some good starting points might be to read up on the 3D hardware in the original Playstation (1994) https://en.wikipedia.org/wiki/PlayStation_technical_specifications https://en.wikipedia.org/wiki/PlayStation_technical_specific... >"Geometry Transformation Engine (GTE) Coprocessor [PDS: aka "GPU"] that resides inside the main CPU processor, giving it additional vector math instructions used for 3D graphics, lighting, geometry, polygon and coordinate transformations – GTE performs high-speed matrix multiplications. Well, there we go, there's the start of the 3D math part, vector math instructions and high-speed matrix multiplications. Then there is "Fused Multiply Add", aka "Multiply Accumulate Operation": https://en.wikipedia.org/wiki/Multiply%E2%80%93accumulate_operation https://en.wikipedia.org/wiki/Multiply%E2%80%93accumulate_op... >"A fast FMA can speed up and improve the accuracy of many computations that involve the accumulation of products: Dot product Matrix multiplication Polynomial evaluation" PDS: Which would be used in 3D Graphics acceleration... Anyway, those are the starting points to look into if someone wants to "leap off" into this area... This is an interesting topic; it sort of exists as confluence of several disciplines -- including Digital Logic Engineering, Algorithms, Law and Math... (But seriously, how does anyone patent MATH itself? I mean, seriously! <g>)
teleforce 6y ago
Fun facts, Intel built-in integrated GPU or iGPU is now standard across Intel's CPU offering including the low power processors designed for embedded IoT systems namely Atom, Pentium and Celeron [1]. This new iGPU has similar performance with a discrete Nvidia's GPU two years back, GeForce GT 1030! [1]https://www.notebookcheck.net/Intel-s-Elkhart-Lake-SoC-will-feature-a-Gen11-iGPU.414181.0.html https://www.notebookcheck.net/Intel-s-Elkhart-Lake-SoC-will-...
peter_d_sherman 6y ago
The following processor, if it can properly parallelize 3D Math tasks (or if it could be adapted to do so): "World’s First 1k-Processor Chip, Powered by a Single AA Battery (2016)" https://news.ycombinator.com/item?id=26140957 https://news.ycombinator.com/item?id=26140957 ...Might make a good candidate for a future GPU! ...As might any massively-parallel "CPU" architecture, for example, the Adapteva Parallella: https://en.wikipedia.org/wiki/Adapteva https://en.wikipedia.org/wiki/Adapteva >"The 16-core Parallella has roughly 5.0 GFLOPs/W, and the 64-core Epiphany-IV made with 28 nm estimated as 50 GFLOPs/W (single-precision),[27] and 32-board system based on them has 15 GFLOPS/W.[28] For comparison, top GPUs from AMD and Nvidia reached 10 GFLOPs/W for single-precision in 2009–2011 timeframe.[29]" In other words, whenever you hear about a CPU with a "massive amount of cores" -- think "could make a great GPU", or "could make a great GPU with the right adjustments" -- from this point forward! In other words, any massively parallel multi-core CPU architecture -- becomes or can become -- a candidate architecture to become a GPU -- with further changes/optimizations...
- ebcode 6y ago
  > In other words, whenever you hear about a CPU with a "massive amount of cores" -- think "could make a great GPU", or "could make a great GPU with the right adjustments" -- from this point forward! Before doing that, though, they should research the difference between SIMD and MIMD. Multi-core CPUs are generally MIMD, and GPUs are always SIMD†. † If someone knows of a MIMD GPU architecture, please share!
  - ebcode 6y ago
    -- researching this a bit now, the one thing I've found is the Intel Larrabee: https://en.wikipedia.org/wiki/Larrabee_(microarchitecture) https://en.wikipedia.org/wiki/Larrabee_(microarchitecture), cancelled and transmogrified into the xeon phi. still haven't found a consumer graphics card with a MIMD architecture. I'm guessing there might be more on-going research in this area with the GPGPU on FPGA communities.

Related: Ben Eater - Let’s build a video card! https://eater.net/vga https://eater.net/vga Embedded Thoughts Blog - Driving a VGA Monitor Using an FPGA https://embeddedthoughts.com/2016/07/29/driving-a-vga-monitor-using-an-fpga/ https://embeddedthoughts.com/2016/07/29/driving-a-vga-monito... Ken Shirriff - Using an FPGA to generate raw VGA video:FizzBuzz with animation http://www.righto.com/2018/04/fizzbuzz-hard-way-generating-vga-video.html http://www.righto.com/2018/04/fizzbuzz-hard-way-generating-v... Clifford Wolf - SimpleVOut -- A Simple FPGA Core for Creating VGA/DVI/HDMI/OpenLDI Signals https://github.com/cliffordwolf/SimpleVOut https://github.com/cliffordwolf/SimpleVOut PDS: Also, this looks interesting, from SimpleVOut: >"svo_vdma.v A video DMA controller. Has a read-only AXI4 master interface to access the video memory."

fortran77 6y ago
Yeah, but these people aren't doing GPGPU computation
- phendrenad2 6y ago
  Or even anything resembling even 2D graphics acceleration.

marcodiego 6y ago

There's people keeping OpenVGA alive[1]. With the failure of the open grahics project[2] is there any known promising projects besides libregpu[3]? [1] https://github.com/elec-otago/openvga https://github.com/elec-otago/openvga [2] https://en.wikipedia.org/wiki/Open_Graphics_Project https://en.wikipedia.org/wiki/Open_Graphics_Project [3] https://libre-soc.org/3d_gpu/ https://libre-soc.org/3d_gpu/

phkahler 6y ago
>> is there any known promising projects besides libregpu? I think the most useful thing right now would be a high quality version of the "easy" parts of a GPU. Basic scan out, possibly overlays, color space conversion, buffer handling. This would allow ANY open processor projects to have frame buffer graphics and run LLVMpipe for basic rendering and desktop compositing. This may be slow, but it is required for every open GPU project, while a SoC can live without the actual GPU for some applications. IMHO, first thing first.
- marcodiego 6y ago
  Yeah. I also miss the small but firm steps approach.
  - lkcl 6y ago
    this is what we're doing in Libre-SOC, and using standard python software engineering practices (writing unit tests at every step of the way) to do it. some of those unit tests are actually Formal Correctness Proofs (asserts, but for hardware). i was stunned to find that in the hardware world, test-driven development is not standard practice: people simply haven't been trained that way. they write thousands to tens of thousands of lines of unverified code and finally do an integration test.
- lkcl 6y ago
  this is easy to chuck together in a few days, literally, from pre-existing components found on the internet. * litex (choose any one of the available cores) * richard herveille's excellent rgb_ttl / VGA HDL https://github.com/RoaLogic/vga_lcd https://github.com/RoaLogic/vga_lcd * some sort of "sprite" graphics would do https://hackaday.com/2014/08/15/sprite-graphics-accelerator-on-an-fpga/ https://hackaday.com/2014/08/15/sprite-graphics-accelerator-... the real question is: would anyone bother to give you the money to make such a project, and the question before that is: can you tell a sufficiently compelling story to get customers - real customers with money - to write you a Letter of Intent that you can show to investors? if the answer to either of those questions is "no" then, with many apologies for pointing this out, it's a waste of your time unless you happen to have some other reason for doing the work - basically one with zero expectation up-front of turning it into a successful commercial product. now, here's the thing: even if you were successful in that effort, it's so trivial (Richard Herveille's RGB/TTL HDL sits as a peripheral on the Wishbone Bus) that it's like... why are you doing this again? the real effort is the 3D part - Vulkan compliance, Texture Opcodes, Vulkan Image format conversion opcodes (YUV2RGB, 8888 to 1555 etc. etc.), SIN/COS/ATAN2, Dot Product, Cross Product, Vector Normalisation, Z-Buffers and so on.

kleiba 6y ago

I'm a total lay person here, but my understanding is that designing a new processor is very challenging these days because of the patent situation. That is, so much in hardware design is patented that you're bound to run into problems if you don't know what you're doing. Is this true, and is it of relevance here?

ChuckNorris89 6y ago
Not sure of how relevant it is here, but yes, GPUs architectures are bound by tons of patents so you can bet your a$$ that if you were to commercially launch your own GPU IP, you'll have Nvidia's and AMD's lawyers knocking on your door in under 10 seconds. IIRC most companies out there selling GPU IP are still paying royalties to AMD for their patents on shader architecture which they got from their acquisition of ATI which in turn came from their acquisition of ArtX which was founded by people who worked at the long defunct SGI (Silicon Graphics). The funny thing is, if you backtrack through all GPU innovations, most stem from former SGI employees. When 3Dfx went under, even though Nvidia's GPU tech was already superior to anything 3Dfx had, Nvidia immediately swept in and picked their carcass clean, mostly for their patents in this space, so they would have more ammo/leverage against competitors going forward. Regardless how you feel about patents, with their pros and cons, hardware engineering is a capital intensive business and without patents to protect your expensive R&D, it wouldn't be a viable business.
- joshspankit 6y ago
  To clarify what I think is the relevance, as well as to explore my own questions: If someone were to clean-room design their own GPU chip, how likely is it that Nvidia and AMD would come down on them anyway simply by virtue of the fact that they (presumably) have patents on everything that you could think of putting in that chip? In essence: do you now have to be an expert in what you’re not allowed to put in before you even start?
  - ChuckNorris89 6y ago
    To clarify further, Nvidia and AMD (and probably other small players like ARM, Quallcomm, Imagination) own the patents on core shader tech, which are the building blocks of any modern GPU design. If you want to design a GPU IP that works around all their patents, you probably can, but unless you're a John Carmack x10, your resulting design would be horribly inefficient and not competitive enough to be worth the expensive silicon it will be etched on and probably not compatible to any modern API like Vulcan or DirectX. But if you just want to build your own meme GPU for education/shits and giggles, that doesn't follow any patents or APIs, then you can and some people already did: https://www.youtube.com/watch?v=l7rce6IQDWs https://www.youtube.com/watch?v=l7rce6IQDWs

antman 6y ago

Layman here! I see a lot of posts on that subject lately so I need to ask: Can someone design a RAM chip?

detaro 6y ago
What do you mean specifically by "design a RAM chip"? (obviously RAM chips that you can buy are designed before they are made, so that's probably not what you are after?) FPGAs typically do contain dedicated RAM areas, because implementing it out of FPGA logic slices is terribly inefficient.
- tcherasaro 6y ago
  FPGA designer here. Just wanted to point out that “efficiency” is highly context sensitive in FPGA design. Everything is an area / speed / power trade-off. If you only need a ram that is 8-bits wide and 64 words deep then it might be way inefficient to waste a dedicated 18kbit block ram on it when it would fit better into 2 LUTs. This is why Xilinx, for one, provides pragma such as RAM_STYLE to help guide synthesis: (* ram_style = "distributed" *) reg [data_size-1:0] myram [2**addr_size-1:0]; block: Instructs the tool to infer RAMB type components. distributed: Instructs the tool to infer the LUT RAMs. registers: Instructs the tool to infer registers instead of RAMs. ultra: Instructs the tool to use the UltraScale+TM URAM primitives. See: https://www.xilinx.com/support/documentation/sw_manuals/xilinx2019_2/ug901-vivado-synthesis.pdf https://www.xilinx.com/support/documentation/sw_manuals/xili... edit: formatting*
  - M277 6y ago
    Hey there, sorry for going off topic, but as a FPGA designer, are there any learning resources you would particularly recommend for someone starting with FPGAs by themselves? With the goal of learning more about computer architecture and the way CPUs work on a lower level.
    - tcherasaro 6y ago
      Not off the top of my head. I would definitely recommend trying to find a mentor with current experience rather than getting started by yourself if possible depending on your background. The last time I mentored someone and looked at beginner resources was over 10 years ago and at that time I was recommending beginners with at least some of the requisite college coursework buy and read "The Design Warriors Guide to FPGAs" to get started and then buy and use at least one of Peter J. Ashenden VHDL and Verilog texts as HDL language references. Much of The Design Warriors Guide might still be relevant but I haven't looked at in a while. Ashenden's books are probably still mostly relevant for the versions of the languages they covered, but these days I would try to also find a good book on SystemVerilog. All that is probably overkill towards the goal of learning more about computer architecture and the way CPUs work on a lower level though. For me I found all my undergraduate and graduate coursework, including a class on operating systems, to be essential to my understanding and real world use.

FPGAhacker 6y ago

One of the things that interests me (of many), is the use of cmake. Does anyone have good references on extending cmake to new tools that don’t produce executables per se, or otherwise work in non traditional ways?

code-scope 6y ago

Very Cool project: Love GPGPU, I git clone it and try to understand the code better here: https://www.code-scope.com/s/s/u#c=sd&uh=0f2c2fa280a2&h=afe7a329&di=-1&i=38 It looks like 5 stages FP (FP32?) pipe lines, NUM_VECTOR_LANES =16 NUM_REGISTERS=32 Are you writing your own kernel from scratch? If so which CPU does it runs on - some embedded CPU inside FPGA? In the mandelbrot.c code, it has following: #define vector_mixi __builtin_nyuzi_vector_mixi How does it get translate to vector operations in FPGA? Where is the code implement the __builtin_*? Thanks a lot an very interesting project.

ourlordcaffeine 6y ago

Are there open source opencl to FPGA compilers? If you're playing with FPGA's, you might as well directly compile the kernel into a circuit, rather than building a gpu on an FPGA and running your kernel on that. Proprietary solutions like Altera OpenCL compiler exist.

peter_d_sherman 6y ago

A guide for the impatient: GPU = CPU, but one that is placed specifically on the graphics card, and one that may specifically be optimized to perform instructions related to 3D calculations faster than other instructions. As far as the 3D stuff, don't think "3D", instead think Math specifically related to 3D. OK, so what is that Math? Well, we could consult Stack Overflow for that: https://stackoverflow.com/questions/1320403/math-used-in-3d-game-engine-programming https://stackoverflow.com/questions/1320403/math-used-in-3d-... OK, so next question, what does a GPU do then? Well, remember that a CPU can run any generalized algorithmic computations -- including those required for 3D graphics(!) (they are Turing-Complete, after all!), but the thing is, 3D graphics cards have their GPU's, er, CPU's, er, GPU's -- specifically optimized in various different ways (parallelism, specific instruction types, etc.) for the mathematics of 3D. So you see, what is being searched for is as follows: The fastest CPU, er, GPU, er CPU, that can be created on an FPGA, that can be optimized for specific 3D MATH operations, that can be created patent-free. Now, here's the thing... In Mathematics, TMTOWTDI (There's more than one way to do it) -- is King. While some math algorithms (side philosophical question to self, "How does anyone patent MATH?". No really, how do they do it? That idea is utterly mind boggling and self-contradictory! It's like what the Principal said to Billy Madison: "Mr. Madison, what you've just said is one of the most insanely idiotic things I have ever heard. At no point in your rambling, incoherent response were you even close to anything that could be considered a rational thought. Everyone in this room is now dumber for having listened to it. I award you no points, and may God have mercy on your soul."), while some math algorithms implemented in hardware are patented (and possibly still under patent) -- there are many others that are not! In other words, there are other ways to get the job done... Some good starting points might be to read up on the 3D hardware in the original Playstation (1994) https://en.wikipedia.org/wiki/PlayStation_technical_specifications https://en.wikipedia.org/wiki/PlayStation_technical_specific... >"Geometry Transformation Engine (GTE) Coprocessor [PDS: aka "GPU"] that resides inside the main CPU processor, giving it additional vector math instructions used for 3D graphics, lighting, geometry, polygon and coordinate transformations – GTE performs high-speed matrix multiplications. Well, there we go, there's the start of the 3D math part, vector math instructions and high-speed matrix multiplications. Then there is "Fused Multiply Add", aka "Multiply Accumulate Operation": https://en.wikipedia.org/wiki/Multiply%E2%80%93accumulate_operation https://en.wikipedia.org/wiki/Multiply%E2%80%93accumulate_op... >"A fast FMA can speed up and improve the accuracy of many computations that involve the accumulation of products: Dot product Matrix multiplication Polynomial evaluation" PDS: Which would be used in 3D Graphics acceleration... Anyway, those are the starting points to look into if someone wants to "leap off" into this area... This is an interesting topic; it sort of exists as confluence of several disciplines -- including Digital Logic Engineering, Algorithms, Law and Math... (But seriously, how does anyone patent MATH itself? I mean, seriously! <g>)

teleforce 6y ago

Fun facts, Intel built-in integrated GPU or iGPU is now standard across Intel's CPU offering including the low power processors designed for embedded IoT systems namely Atom, Pentium and Celeron [1]. This new iGPU has similar performance with a discrete Nvidia's GPU two years back, GeForce GT 1030! [1]https://www.notebookcheck.net/Intel-s-Elkhart-Lake-SoC-will-feature-a-Gen11-iGPU.414181.0.html https://www.notebookcheck.net/Intel-s-Elkhart-Lake-SoC-will-...

peter_d_sherman 6y ago

The following processor, if it can properly parallelize 3D Math tasks (or if it could be adapted to do so): "World’s First 1k-Processor Chip, Powered by a Single AA Battery (2016)" https://news.ycombinator.com/item?id=26140957 https://news.ycombinator.com/item?id=26140957 ...Might make a good candidate for a future GPU! ...As might any massively-parallel "CPU" architecture, for example, the Adapteva Parallella: https://en.wikipedia.org/wiki/Adapteva https://en.wikipedia.org/wiki/Adapteva >"The 16-core Parallella has roughly 5.0 GFLOPs/W, and the 64-core Epiphany-IV made with 28 nm estimated as 50 GFLOPs/W (single-precision),[27] and 32-board system based on them has 15 GFLOPS/W.[28] For comparison, top GPUs from AMD and Nvidia reached 10 GFLOPs/W for single-precision in 2009–2011 timeframe.[29]" In other words, whenever you hear about a CPU with a "massive amount of cores" -- think "could make a great GPU", or "could make a great GPU with the right adjustments" -- from this point forward! In other words, any massively parallel multi-core CPU architecture -- becomes or can become -- a candidate architecture to become a GPU -- with further changes/optimizations...

ebcode 6y ago
> In other words, whenever you hear about a CPU with a "massive amount of cores" -- think "could make a great GPU", or "could make a great GPU with the right adjustments" -- from this point forward! Before doing that, though, they should research the difference between SIMD and MIMD. Multi-core CPUs are generally MIMD, and GPUs are always SIMD†. † If someone knows of a MIMD GPU architecture, please share!
- ebcode 6y ago
  -- researching this a bit now, the one thing I've found is the Intel Larrabee: https://en.wikipedia.org/wiki/Larrabee_(microarchitecture) https://en.wikipedia.org/wiki/Larrabee_(microarchitecture), cancelled and transmogrified into the xeon phi. still haven't found a consumer graphics card with a MIMD architecture. I'm guessing there might be more on-going research in this area with the GPGPU on FPGA communities.