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If we’re going to look at the “big” ISAs (big in the sense that they run things like workstations and servers)… there aren’t that many to look at. Cherry-pickin
by klodolph 6y ago
If we’re going to look at the “big” ISAs (big in the sense that they run things like workstations and servers)… there aren’t that many to look at. Cherry-picking three of them to tell a story seems a bit fishy to me. SPARC and POWER aren’t exactly taking over the world. SPARC is still around in the same sense that MIPS is still around—you can still buy SPARC CPUs—but the ISA won’t be on your radar unless you’re interested in very specific applications or if you’re a retrocomputing enthusiast.
I’m not sure whether the ownership changes can be attributed as causes or as symptoms of ISA market failure here. My understanding is that somewhere from 2000-2010, the cost of developing a cutting-edge ISA + an associated line of CPUs got too expensive, and companies like SGI were priced out of the market.
In other words, MIPS wasn’t sold off and then it failed. SGI needed to get rid of MIPS because it was too expensive, and without the backing of SGI, MIPS was doomed to a “cheaper, older-generation” CPU niche. There but for the grace of god goes ARM, which happened to find a new niche because it was already optimized for a use case (low power consumption) that people started really caring about in the 2010s.
- mhh__ 6y agoPOWER10 is quite cool, but IBM don't want to go the effort of selling to the plebs.
- klodolph 6y agoIt is—and I think that, unfortunately, POWER10’s primary niche is to provide the most plausible alternative to x86. Selling to plebs is (1) expensive since the economy of scale isn’t there and (2) not useful to IBM’s business strategy anyway. Like, if you are buying 10,000 x86 processors from Intel, then you tell Intel, “Don’t charge us too much, or we’ll buy POWER systems from IBM instead.” Intel chuckles, since they know you’re not serious, but (1) you buy a few racks of POWER systems and make your engineers build and test everything on POWER to make your negotiation position more credible, and (2) Intel knows they can’t charge you more than IBM does. The other niche for POWER, as far as I can tell, is that it has various certifications, or it’s used in systems with various certifications that x86 doesn’t have (e.g. certain aerospace / defense applications). For example, the RAD5545 is a rad-hard POWER SoC.
- wmf 6y agoBy the time POWER10 comes out ARM (e.g. Altra Max) will be a more plausible alternative.
- klodolph 6y agoWill it be? What makes you say that? I’m a little skeptical because it looks like they are trying to paper over the weaknesses in ARM CPUs by e.g. throwing more cores on a chip, derating competitor’s benchmarks, etc. Not to say it won’t eventually be successful, but the Xeons don’t have a smaller number of bigger cores by accident.
- imtringued 6y agoMy misadventures with multi core programming tell me that there is zero demand for multicore application development. Although I have experienced that the vast, vast majority of problems can be divided to run on multiple cores, assuming you have enough work for the cores. There was a problem where I convinced myself it could not be done without locking and a complicated transaction scheme but I still somehow managed to turn the problem into a data parallel algorithm. The code is extremely counterintuitive, error prone and both hard to write and read. However, writing a purely parallel application is so much work even for an expert that there is a huge productivity drop in many cases and for non experts a lot of the problems are intractable, so it is only done when absolutely necessary. So my general strategy has been to significantly relax maximum possible parallelism in exchange for the ability to pretend that your code is single threaded. The general idea is quite simple. Split your data into smaller segments. If a segment accesses another segment merge the two into a big segment. Then process each segment as if it was single threaded but you can process independent segments in parallel. The big problem with this approach are pathological cases where you get very large segments. One (fictional) example would be a simulation involving long distance transport. Train stations that are connected with rails form a very huge graph of segments consisting of dozens of train stations. However, airports are not connected so each airport can still be simulated in parallel and if you have multiple rail networks you can simulate each on a separate core. It's far faster than staying purely single threaded but it means that you will always be bottlenecked by your slowest core and that means current ARM offerings will be behind unless you are doing something extremely multi core intensive like video encoding which will gobble up as many cores as you have.
- pm215 6y agos390x is another "live" CPU architecture, but it's a bit of a special case -- the niche of "IBM mainframe" is unlikely to go away any time soon, but it's not expanding either and the architecture isn't about to leave that niche...
- ableal 6y ago> caring about in the 2010s Earlier than that, the PDA/smartphone market (e.g. https://en.wikipedia.org/wiki/IPAQ https://en.wikipedia.org/wiki/IPAQ ) was ARM a decade before, and the iPhone was in 2007. I believe MIPS CPUs were in laser printers etc, but out of the mobile market, except for the occasional laptop.
- kjs3 6y agoMIPS was used heavily in networking, and to an extent still is. Cisco was notably fond of them.