4 ms·

> unless the x86 market tanked badly That has always been a question of when, not if. And M1 shows that it is quickly approaching. In a market where physical l

> unless the x86 market tanked badly That has always been a question of when, not if. And M1 shows that it is quickly approaching. In a market where physical limits have slowed down miniaturization, with just 5-10 years away from a standstill, a low efficiency instruction set focused on backwards binary compatibility is going to get washed out of most usecases very quickly. It's going the way of the IBM mainframe - still sold decades after its heyday, but marginalized to a niche (bunch of enterprise cloud instances for software that is too expensive to recompile/port).

bryanlarsen 6y ago
M1's awesomeness has almost nothing to do with the instruction set. AMD64 and ARM64 are very similar in terms of complexity. M1's awesomeness has to do with: - assembling a killer team - 5nm process - high speed, low latency DRAM - big-little The only substantive difference between the AMD64 and ARM64 instruction sets is that ARM64 has a more relaxed memory model.
- api 6y ago
  Not true from what I’ve read. The problem with x86 is not complexity but variable instruction lengths. This makes it hard to determine instruction boundaries, complicating decoders and making more than 4-way decode hard. M1 has 8 decoders for comparison, and it would be easy to have 100 with ARM if there were a benefit to that many.
  - bryanlarsen 6y ago
    1. AMD64 is a lot easier to decode than the legacy i86 8/16/32 bit instruction set. 2. Decoding took a significant portion of the chip when they were a million transistors. The m1 has 16 billion resistors, decoding is a much less significant fraction of the chip.
    - petra 6y ago
      Complexity isn't only about transistors, but also about delay. And sure, there's pipelining but than your limited by latency.
  - ben-schaaf 6y ago
    > The limitation of the x86 decoder is that each clock cycle can only process up to 4 instructions, but if it is a familiar instruction, it can be placed in the operation cache, and 8 instructions can be processed per cycle. http://www.apothetech.com/amd-zen-3-vs-zen-2-amd-zen-3-is-39-more-powerful/ http://www.apothetech.com/amd-zen-3-vs-zen-2-amd-zen-3-is-39...

bryanlarsen 6y ago

M1's awesomeness has almost nothing to do with the instruction set. AMD64 and ARM64 are very similar in terms of complexity. M1's awesomeness has to do with: - assembling a killer team - 5nm process - high speed, low latency DRAM - big-little The only substantive difference between the AMD64 and ARM64 instruction sets is that ARM64 has a more relaxed memory model.

api 6y ago
Not true from what I’ve read. The problem with x86 is not complexity but variable instruction lengths. This makes it hard to determine instruction boundaries, complicating decoders and making more than 4-way decode hard. M1 has 8 decoders for comparison, and it would be easy to have 100 with ARM if there were a benefit to that many.
- bryanlarsen 6y ago
  1. AMD64 is a lot easier to decode than the legacy i86 8/16/32 bit instruction set. 2. Decoding took a significant portion of the chip when they were a million transistors. The m1 has 16 billion resistors, decoding is a much less significant fraction of the chip.
  - petra 6y ago
    Complexity isn't only about transistors, but also about delay. And sure, there's pipelining but than your limited by latency.
- ben-schaaf 6y ago
  > The limitation of the x86 decoder is that each clock cycle can only process up to 4 instructions, but if it is a familiar instruction, it can be placed in the operation cache, and 8 instructions can be processed per cycle. http://www.apothetech.com/amd-zen-3-vs-zen-2-amd-zen-3-is-39-more-powerful/ http://www.apothetech.com/amd-zen-3-vs-zen-2-amd-zen-3-is-39...