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AMD, Nvidia, and Marvell after the Cavium acquisition could do it. Intel could too but wouldn’t unless the x86 market tanked badly.

by api 6y ago

m_mueller 6y ago
> unless the x86 market tanked badly That has always been a question of when, not if. And M1 shows that it is quickly approaching. In a market where physical limits have slowed down miniaturization, with just 5-10 years away from a standstill, a low efficiency instruction set focused on backwards binary compatibility is going to get washed out of most usecases very quickly. It's going the way of the IBM mainframe - still sold decades after its heyday, but marginalized to a niche (bunch of enterprise cloud instances for software that is too expensive to recompile/port).
- bryanlarsen 6y ago
  M1's awesomeness has almost nothing to do with the instruction set. AMD64 and ARM64 are very similar in terms of complexity. M1's awesomeness has to do with: - assembling a killer team - 5nm process - high speed, low latency DRAM - big-little The only substantive difference between the AMD64 and ARM64 instruction sets is that ARM64 has a more relaxed memory model.
  - api 6y ago
    Not true from what I’ve read. The problem with x86 is not complexity but variable instruction lengths. This makes it hard to determine instruction boundaries, complicating decoders and making more than 4-way decode hard. M1 has 8 decoders for comparison, and it would be easy to have 100 with ARM if there were a benefit to that many.
    - bryanlarsen 6y ago
      1. AMD64 is a lot easier to decode than the legacy i86 8/16/32 bit instruction set. 2. Decoding took a significant portion of the chip when they were a million transistors. The m1 has 16 billion resistors, decoding is a much less significant fraction of the chip.
      - petra 6y ago
        Complexity isn't only about transistors, but also about delay. And sure, there's pipelining but than your limited by latency.
    - ben-schaaf 6y ago
      > The limitation of the x86 decoder is that each clock cycle can only process up to 4 instructions, but if it is a familiar instruction, it can be placed in the operation cache, and 8 instructions can be processed per cycle. http://www.apothetech.com/amd-zen-3-vs-zen-2-amd-zen-3-is-39-more-powerful/ http://www.apothetech.com/amd-zen-3-vs-zen-2-amd-zen-3-is-39...
gumby 6y ago
Back in the Andy Grove era Intel exited its original business (memory) while it was profitable, foreseeing its rapid commoditization. The Intel of today sold off its excellent ARM business (acquired from DEC) and is incapable of doing anything but ride a sinking ship to doom.
- tmzt 6y ago
  At the time, StrongARM and PXA dominated PDAs and smartphones, while the higher-end parts were used in storage devices. It's a little confusing still why they sold the whole thing while the market was growing. Marvell seemingly abandoned portable devices and rolled IXP(?) into their own lines for a time.
nolok 6y ago
Eh, Intel was so scared of itself it even stopped Atom getting properly powerful, and that was x86. No way they will get into the ARM team, the instant what they build starts being powerful they will get scared of it too and kill it. A good part of why they take such a beating in x86 too, Intel has no backup plan because they're scared of their own backup up, while being oblivious to the fact that it was their backup plan that saved them during the post-P4 era. At least AMD is not scared of throwing away their arch every few years and restart, they've pretty much been doing that like clockwork every five years for the past two decades.

AMD, Nvidia, and Marvell after the Cavium acquisition could do it. Intel could too but wouldn’t unless the x86 market tanked badly.

by api 6y ago

AMD, Nvidia, and Marvell after the Cavium acquisition could do it. Intel could too but wouldn’t unless the x86 market tanked badly.

m_mueller 6y ago

> unless the x86 market tanked badly That has always been a question of when, not if. And M1 shows that it is quickly approaching. In a market where physical limits have slowed down miniaturization, with just 5-10 years away from a standstill, a low efficiency instruction set focused on backwards binary compatibility is going to get washed out of most usecases very quickly. It's going the way of the IBM mainframe - still sold decades after its heyday, but marginalized to a niche (bunch of enterprise cloud instances for software that is too expensive to recompile/port).

bryanlarsen 6y ago
M1's awesomeness has almost nothing to do with the instruction set. AMD64 and ARM64 are very similar in terms of complexity. M1's awesomeness has to do with: - assembling a killer team - 5nm process - high speed, low latency DRAM - big-little The only substantive difference between the AMD64 and ARM64 instruction sets is that ARM64 has a more relaxed memory model.
- api 6y ago
  Not true from what I’ve read. The problem with x86 is not complexity but variable instruction lengths. This makes it hard to determine instruction boundaries, complicating decoders and making more than 4-way decode hard. M1 has 8 decoders for comparison, and it would be easy to have 100 with ARM if there were a benefit to that many.
  - bryanlarsen 6y ago
    1. AMD64 is a lot easier to decode than the legacy i86 8/16/32 bit instruction set. 2. Decoding took a significant portion of the chip when they were a million transistors. The m1 has 16 billion resistors, decoding is a much less significant fraction of the chip.
    - petra 6y ago
      Complexity isn't only about transistors, but also about delay. And sure, there's pipelining but than your limited by latency.
  - ben-schaaf 6y ago
    > The limitation of the x86 decoder is that each clock cycle can only process up to 4 instructions, but if it is a familiar instruction, it can be placed in the operation cache, and 8 instructions can be processed per cycle. http://www.apothetech.com/amd-zen-3-vs-zen-2-amd-zen-3-is-39-more-powerful/ http://www.apothetech.com/amd-zen-3-vs-zen-2-amd-zen-3-is-39...

gumby 6y ago

Back in the Andy Grove era Intel exited its original business (memory) while it was profitable, foreseeing its rapid commoditization. The Intel of today sold off its excellent ARM business (acquired from DEC) and is incapable of doing anything but ride a sinking ship to doom.

tmzt 6y ago
At the time, StrongARM and PXA dominated PDAs and smartphones, while the higher-end parts were used in storage devices. It's a little confusing still why they sold the whole thing while the market was growing. Marvell seemingly abandoned portable devices and rolled IXP(?) into their own lines for a time.

nolok 6y ago

Eh, Intel was so scared of itself it even stopped Atom getting properly powerful, and that was x86. No way they will get into the ARM team, the instant what they build starts being powerful they will get scared of it too and kill it. A good part of why they take such a beating in x86 too, Intel has no backup plan because they're scared of their own backup up, while being oblivious to the fact that it was their backup plan that saved them during the post-P4 era. At least AMD is not scared of throwing away their arch every few years and restart, they've pretty much been doing that like clockwork every five years for the past two decades.