4 ms·
Well, it uses 12.5% of the bytes for error correction instead of data storage, which is not very much overhead. Your 128GB becomes 112GB, which is still pretty
by jrockway 6y ago
Well, it uses 12.5% of the bytes for error correction instead of data storage, which is not very much overhead. Your 128GB becomes 112GB, which is still pretty good.
I also disagree that the benefits are meager. I have suffered from several computers with flaky memory (fine when you build the computer, flaky several years later; then you do an overnight memory test and find that indeed the memory has gone bad), and a strong software signal that "hey your memory is bad" is very actionable. You also have to think about it from a programming standpoint -- what happens if this variable isn't what I set it to? What if "for 1..10" is actually "for 1..2147483658"? Do you have time to debug that? How much data do you lose when you persist that to disk? To me it is insane to not get this nearly-free consistency check if you ever plan to persist any bytes in RAM to long-term storage. Even consumer GPUs have ECC memory these days. It's a no-brainer.
What surprises me is that the industry segments RAM sticks by ECC/not-ECC, when it's just a software function performed by the memory controller. I think everyone with a HEDT setup would be happy to enable ECC and get better reliability at the cost of 12% less RAM. I know I would be. (I built a Threadripper workstation recently and just couldn't get any reasonable prices on QVL'd ECC memory. So I skipped it and paid like $600 for 128GB of 3600MT/16-CAS memory... would be happy to flip a switch and have that be only 112GB.)
The reason why ECC isn't widespread is it's because it's used to segment the market. Home users are cost sensitive, so hardware vendors have to think of ways to get server users to not buy home user equipment. ECC is one of these levers. That's all there is to it. Everyone would have ECC if it were a mere 12.5% more expensive.
- Thetawaves 6y agoThis is not how ECC ram works. 128GB of ram does not change to 112GB with ECC. 128GB of ram with ECC will invariably be 144GB. Standard memory modules become (a multiple of) 9 bits wide, with the additional bit stored near the other 8 bits.
- StillBored 6y agoWhich is still 12.5%. Which for most people wouldn't be a problem since ram is a fraction of the system price (so it might only raise the price of the machine 3% if the ram is 1/3 of the total BOM). The problem is _INTEL_ deciding its a premium feature, and the memory manufactures charging 50%+ more for 12.5% more hardware. So instead of being a couple percent of the system cost, it ends up being a noticeable double digit percentage. Of course none of this explains why apple/etc haven't done it in their phones.
- Thetawaves 6y agoYou seem to be commenting on cost figures, but have not actually identified the cost / sales volume relationship. ECC memory physically requires additional wires, necessitating different parts that don't sell at the same volumes.
- StillBored 6y agoNot sure what volume has to do with it, if the whole market is ECC. And as far as "wires", traces are basically free as long as they don't force additional pcb layers, which shouldn't be the case given the careful pin/ddr chip/processor designs focused on exactly that. The extra pins are there regardless, and in the past so were the "wires" given that CBx/DMx pins were muxed. Further, packetized ram interfaces have been known to bury the error correction in the protocol same as PCIe/etc. Meaning its a slight efficiency loss. Look at it this way, every part of the system _EXCEPT_ the ram has some kind of error correction on it at this point. Its a cheap way to not only increase robustness but its also a security mechanism. If I were guessing, I would say that DDR5 is the last version that isn't ECC end to end, the idea that the manufactures can shrink the dies at the cost of some BER and make it up with a bit of embedded ECC will just be to tempting. Particularly with AMD on the rise, intel will have a much harder time playing product segmentation games if AMD doesn't do the same.
- jasonwatkinspdx 6y agoIt's not just about the cost of a pcb trace. A wider parallel bus means more potential skew which means either relaxing timing or tighter tolerances. The notional 12% cost for the extra ram bank and related hardware may not seem like much, but the margins on commodity computing equipment are razor thin. Consumers don't and won't buy on the basis of ECC being on a sticker on the box, so manufacturers correctly conclude that they should cut the feature or be undercut on price.
- deleted 6y ago[deleted]
- sliken 6y ago
- jrockway 6y agoI know that's not how it's sold (your "128GB" stick actually contains 144GB of memory if it's ECC), but that's dumb and drives up the cost. Needing two SKUs is kind of the problem, and it's not a technical problem.
- Thetawaves 6y agoNeeding an additional bit to store ECC data is not a technical problem?
- theginger 6y agoThe point he is trying to make is you don't need additional bits, you just need bits, they could be additional, or they could be subtracted from what is available.
- Thetawaves 6y agoHow would this actually work? Memory access on your non-ecc processor is (for example) 64 bits wide. Your data is using all 64 bits. Perhaps you would only use 56 bits for user data and 8 bits of ecc data on every read? Suddenly you need two memory accesses to read your 64bit value?
- stormbrew 6y agoI suppose you could have an extra dimm slot just for ecc storage, and only require it to be 1/8 the size of total ram on the normal slots. (I think there are probably issues with this in terms of how ddr itself actually works with its interleaving and adding a third channel to access from but I don't know enough about how it works to know for sure if that's the case)
- jasonwatkinspdx 6y agoSeparate channels are not timing locked. This would involve a lot more complexity and cost than the current practice. At the end of the day, electrical/computer engineers do actually generally know what they're doing.
- amelius 6y ago> Do you have time to debug that? By the way, for detection you don't need the full error correcting code, but you can use an error detecting code which can use fewer bits.
- fomine3 6y agoUnbuffered ECC RAMs are expensive because of lower demand. Registerd ECC RAMs especially used ones are dirt cheap thanks to huge amount of servers.