5 ms·
From the article: "Another big change to the microarchitecture is the inclusion of an MMU"
by idiot900 6y ago
From the article: "Another big change to the microarchitecture is the inclusion of an MMU"
- bfrog 6y agoThis is pretty massive! If fpga vendors provide this, what a great addition.
- ChuckMcM 6y agoHence my enthusiasm :-)
- sitkack 6y agoWhat level of interposition can one do with these hard cpu cores? Are the cache eviction policies pluggable? Is "user code" in the path between the cpu and main memory?
- ChuckMcM 6y agoOn the Ultrascale Zynq's you can build RAM that is attached to the fabric and available to the processor across the AMBA bus. It isn't something I personally have played with a whole bunch so I can't give you a better answer then to look at the Zynq data sheets. I do know you can make user hardware "appear" as memory to the main CPU.
- sitkack 6y agoNeat. I am stoked to play with the new PolarFire RISC-V Icicle board. https://www.microsemi.com/existing-parts/parts/152514 https://www.microsemi.com/existing-parts/parts/152514 https://www.crowdsupply.com/microchip/polarfire-soc-icicle-kit https://www.crowdsupply.com/microchip/polarfire-soc-icicle-k...