4 ms·

> And why is clock recovery from the data signal necessary in the first place? Can't the clock signal be recovered from the clock signal itself? In many (if no

> And why is clock recovery from the data signal necessary in the first place? Can't the clock signal be recovered from the clock signal itself? In many (if not most) serial communication systems, there's no clock signal. The clock is embedded in the data itself. The data is encoded in a way that always guarantees enough changes (e.g. a long run of '0' or '1' is restricted) , so that the link partner can use the data itself as a reference to recover the clock. This is true for USB, Ethernet, PCI-E, most fiber optics communication systems (installing another cable just for clocking is rather awkward), among others. Ideally, one data signal is all we need. This is known as a self-clocking signal [0]. [0] https://en.wikipedia.org/wiki/Self-clocking_signal https://en.wikipedia.org/wiki/Self-clocking_signal

amelius 6y ago
Thanks for the explanation, but when I look at a typical PCIe card, I see many connections (of which the clock could easily be one). It seems strange to convert to a serial connection with only two wires.
- segfaultbuserr 6y ago
  Indeed, among the 18 pins in a PCI-E x1 slot, only four wires forms the actual data link, two for RX and another two for TX [0]. In terms of space, A PCI-E connection is really a piece of cake. And interestingly, to make a designer's life easier, PCI-E does have a reference clock signal, but it doesn't directly control the data transfer, it's only here for establishing a stable frequency reference, so a card doesn't have to include its own clock (which is a possible option). Since PCI-E Gen 2, its use is entirely optional because data recovery was possible, see [1]. [0] https://en.wikipedia.org/wiki/PCI_Express#Pinout https://en.wikipedia.org/wiki/PCI_Express#Pinout [1] https://www.silabs.com/documents/public/white-papers/PCIe-Clock-Source-Selection.pdf https://www.silabs.com/documents/public/white-papers/PCIe-Cl...

amelius 6y ago

Thanks for the explanation, but when I look at a typical PCIe card, I see many connections (of which the clock could easily be one). It seems strange to convert to a serial connection with only two wires.

segfaultbuserr 6y ago
Indeed, among the 18 pins in a PCI-E x1 slot, only four wires forms the actual data link, two for RX and another two for TX [0]. In terms of space, A PCI-E connection is really a piece of cake. And interestingly, to make a designer's life easier, PCI-E does have a reference clock signal, but it doesn't directly control the data transfer, it's only here for establishing a stable frequency reference, so a card doesn't have to include its own clock (which is a possible option). Since PCI-E Gen 2, its use is entirely optional because data recovery was possible, see [1]. [0] https://en.wikipedia.org/wiki/PCI_Express#Pinout https://en.wikipedia.org/wiki/PCI_Express#Pinout [1] https://www.silabs.com/documents/public/white-papers/PCIe-Clock-Source-Selection.pdf https://www.silabs.com/documents/public/white-papers/PCIe-Cl...