4 ms·

https://images.anandtech.com/doci/15912/DDR5_12.png https://images.anandtech.com/doci/15912/DDR5_12.png DDR4 appears to have had 40 and 32 bit data buses, whil

by tpxl 6y ago

https://images.anandtech.com/doci/15912/DDR5_12.png https://images.anandtech.com/doci/15912/DDR5_12.png DDR4 appears to have had 40 and 32 bit data buses, while this one has 40/40.

Dylan16807 6y ago
In other words, data bits stay at 64 but ECC bits go from 8 to 16.