The economics of FPGAs and ASICs over the past few decades are covered really well in [1]. It's almost always about production volume. The FPGA's ability to be

The economics of FPGAs and ASICs over the past few decades are covered really well in [1]. It's almost always about production volume. The FPGA's ability to be reprogrammed is often a convenient side-effect. In short, no, this doesn't impact the trade-offs and wouldn't even if Google provided this service as a commercial print-on-demand offering. You can get an ASIC fab'd on older nodes for surprisingly cheap, if you have the know-how and access to tools [2]. When power is a first-class design problem (it frequently is), even an "old" 28nm FPGA like Xilinx's 7 series will run rings around an 130nm ASIC. The extra silicon you're powering in the FPGA is more than offset by the economical access it gives you to modern nodes with lower voltages. [1]: https://ieeexplore.ieee.org/document/7086413 https://ieeexplore.ieee.org/document/7086413 [2]: https://spectrum.ieee.org/tech-talk/computing/hardware/lowbudget-chip-design-how-hard-is-it https://spectrum.ieee.org/tech-talk/computing/hardware/lowbu...