CISC is basically a compression codec based on macros. Each macro encodes a batch of micro ops and core engineers are free to decide how to implement them for t

CISC is basically a compression codec based on macros. Each macro encodes a batch of micro ops and core engineers are free to decide how to implement them for the best speed vs silicon trade off for each instruction. The thing that killed RISC (at least the true minimal kind) was the divergence of CPU and RAM speeds. All those instructions saturate the memory bus. Code density became important. X86 is of course a bit of a legacy mess, but the worst thing about it is not too many instructions but how many instruction widths there are. The X86 stream is hard to parse compared with ARM and others with only one or two instruction word sizes. A few ideas from RISC survived, and chief among them was fixed instruction widths, minimizing instruction dependencies, and canonical encodings. RISC-V is really not RISC in the original minimal sense, but it kept the moniker for those aspects. Adding more instructions (macros) to X64 will not make its downsides any worse. That being said, I do wonder if maybe X64 has so many because it is using them to work around the inefficiencies in its instruction encoding. Maybe some of these ops would be just as fast without a big macro if the core instruction set were less crufty, but I am not a CPU engineer.