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Moore's law is about transistor density, which has already slowed way past what Moore's Law (more like Moore's Observation) noted, a doubling of density around
by tracker1 7y ago
Moore's law is about transistor density, which has already slowed way past what Moore's Law (more like Moore's Observation) noted, a doubling of density around every ~18 months (give or take 6)... Stacking may have allowed the trend to continue, but it doesn't seem to work well.
What chiplets offer is effectively more compact compute units designed to work together. What was effectively a component design for multi-cpu systems a couple decades ago happens in a single socket package. With some better design considerations.
This allows for an optimization for loss... if you have a huge single chip, there's more chance you lose a whole chip in a wafer, meaning higher manufacturing loss. With smaller chiplets, you may lose one smaller chiplets, but the other 4-6 around that one lost still works. This means better yeilds out of each wafer.
The other advantage is that you can mix different manufacturing nodes... such as compute or graphics chiplets being latest and greatest with memory and bus interfaces on a prior generation. Again, this allows for greater production and reducing loss.
- pedrocr 7y ago> Moore's law is about transistor density, which has already slowed way past what Moore's Law (more like Moore's Observation) noted, a doubling of density around every ~18 months (give or take 6)... What makes you say that? It looks right on track: https://en.wikipedia.org/wiki/Moore's_law#/media/File:Moore's_Law_Transistor_Count_1971-2018.png https://en.wikipedia.org/wiki/Moore's_law#/media/File:Moore'... Dennard scaling is the one that has broken down and forced us into multi-core versus high-frequency: https://en.wikipedia.org/wiki/Dennard_scaling https://en.wikipedia.org/wiki/Dennard_scaling
- theresistor 7y agoI don't think that chart actually reflects Moore's Law well, because it doesn't normalize for total area. Many of the chips listed, especially at the high end, are very large but not especially dense.
- ghaff 7y agoThe two are pretty related though. If you could build a chip with more transistors economically but had to run it at 500MHz for cooling reasons, you probably wouldn't do that. (The exact nature of the challenges in the two domains differ though.) >What makes you say that? It looks right on track: Especially given that the vertical axis is a log scale, it looks to me as if it's flattening out a bit. I'd have to run an actual regression but that's what it looks like in terms of eyeballing. (And it's consistent with what we know of process nodes slipping out.
- birdyrooster 7y agoThe processors which are creating this flattening of the curve are for low-power, mobile or embedded use-cases where transistor density comes at a bigger cost. The more cores you add, the more overhead power consumption there is for switching.
- kevin_thibedeau 7y agoDensity affects high end processors too. We already are past the point where it's necessary to throttle down to protect a processor from self-destruction. Nobody wants to employ the sort of heat exchanger necessary to keep running full bore all the time. Power consumption takes a back seat to power density.
- vardump 7y agoIt's been past that point more or less for 20 years. Thermal throttling is nothing new.
- BubRoss 7y agoPeople do exactly that. More cores, even at a lower frequency still benefit from the ratio of cycles to memory latency being reduced. The computing power and energy usage is much better, the problem is only software taking advantage of more cores. Intel's most expensive 28 core CPUs have lower clock speeds and more cores.
- ip26 7y agoThis means better yeilds out of each wafer. This can potentially help keep scaling alive. Aside from the question of "can we do it", there's always the other question, "at what cost". Instead of an "impossible" tech node, it's conceivable that we could hit a "too expensive to be worth it" tech node. Thus any scheme to keep yields up helps delay that point.
- hinkley 7y agoChips are manufactured There are many things in this world where one can, for a premium, through your social network, or dumb luck at a second hand store, acquire something that is relatively unique. But if you want something cheap, you are left with what can be made reliably. And if you want to keep buying it in the future, that thing has to be made and sold at a profit. So the only chips you can get are the ones that can be made all day every day. Chiplets are 'just' more of them. Where 'just' means 'assuming you have a cost-effective way to manage the logistics of processing, testing, and assembling an order of magnitude more pieces of inventory, and that the error rate in those processes is less than the difference in yields between chiplets and giant monolithic chips'. Writing that down gave me some new appreciation for a side comment that was made in a chip design interview posted here this year. The guest mentioned how important manufacturing processes are today in chip design, and I don't think any of us outside of that industry understand the smallest fraction of that.
- marcosdumay 7y ago> Moore's law is about transistor density It's about the number (not density) of transistors on the most economic die size. It's broken for a long while, since modern processes are much more expensive than older ones.
- sudosysgen 7y agoScaled for inflation?
- marcosdumay 7y agoWhere exactly do you expect inflation to apply?
- nwallin 7y ago> modern processes are much more expensive than older ones. Huh? The original Pentium was $878 in 1993 dollars when it was released. Adjusted for inflation that's $1,567 2020 dollars. An i9-9900 is $549.
- baybal2 7y ago> The other advantage is that you can mix different manufacturing nodes... such as compute or graphics chiplets being latest and greatest with memory and bus interfaces on a prior generation. Again, this allows for greater production and reducing loss. The "previous generation" doesn't necessarily mean worse these day, nor say much about transistor density. It's a non-secret in the industry that after gate size scaling froze at around 30-40nm, all further advances in density has actually reduced the performance of an individual transistor. You were still able to cram more of them in the same space, and get a net performance benefit from transistor count.