4 ms·

IMO the yield is impressive enough for a prototype. I can't wait for fabless electronics, even if they are orders of magnitude worse than state-of—the-art. Se

IMO the yield is impressive enough for a prototype. I can't wait for fabless electronics, even if they are orders of magnitude worse than state-of—the-art. Sending (compiled) VHDL code to my printer would be hard to beat. We could afford slower transistors, if we had a larger surface to work with.

amelius 7y ago
> We could afford slower transistors, if we had a larger surface to work with. Yes, but the transistors are a lot larger to begin with. You wouldn't be able to put a modern CPU on an A4/letter sized sheet.
- MayeulC 7y ago
  Well, of course, it would be hard. But a 1cm² 22nm die could largely fit (186cm²) into a sheet of paper with a 300nm feature length. And most modern designs are more concerned with gate length, so 22nm->7nm doesn't exactly translate into the expected area gains for the whole chip. One of the downsides of bigger chips is that we're more sensitive to propagation delays and capacitances. On the flip side, capacitors are easier to make. That would likely lead to new architectures: fully asynchronous, maximizing throughput over single thread performance. That'd be quite interesting for neuromorphic architectures, and would likely displace FPGAs in a lot of situations if printers (or circuits) were affordable. Now, imagine 3D integration: that would be… a book! More seriously, having bigger chips to work with means that the contacts can be bigger, thus easier to align. We could also start blurring lines between PCB and IC design, bringing discrete components inside ICs. I admit I don't know yet what a practical size would be, but the last talk I saw on the topic used organic semiconductors, and the channel length was on the order of millimeters. Despite this, it already had quite a lot of potential.
  - zxcmx 7y ago
    One thing I've wondered about for a while is optically inspectable self-printed electronics. If you go down the rabbit hole of wondering "how can I ever trust this computer" far enough this starts looking like a moderately interesting idea. For this application you might want to just print a kind of simple TPM you could use to bootstrap trust or act as a secure enclave for another system. This isn't a thing anyone has meaningfully been able to do for open-source systems before, to my knowledge.
    - amelius 7y ago
      Interesting idea, but once you have multiple layers of interconnect, I think the inspection would become difficult.
      - Accujack 7y ago
        Not to mention waste heat.
      - MayeulC 7y ago
        Surely determining which trace is connected to which would be hard at intersections, but: - You can hypothetically print it yourself, scanning each layer separately - I wonder if some design patterns couldn't be used to prove the circuit wouldn't work if a crossing point was shorted or cut - you could have additionnal, easier-to-check verification circuits - if ordering big circuits, it might be possible to order them whole, as well as layer-by-layer. One could verify each layer, measure it, compute the inertia matrix of the whole and verify it matches. If the feature size is big, though, I'd be wary of discrete components that could have been planted there.
- RodgerTheGreat 7y ago
  If I could print a TMS-1000 or a 6502 on something the size of a postage stamp, using equipment I could reasonably keep in a home workshop, it would be enormously useful. Think embedded, not replacing your desktop.
  - minxomat 7y ago
    I think if anyone will replicate this, a 6502 will be one of the first projects. After all, the feature size is the main thing that prevents the discrete component replicas from being drop-in replacements: https://monster6502.com/ https://monster6502.com/

amelius 7y ago

> We could afford slower transistors, if we had a larger surface to work with. Yes, but the transistors are a lot larger to begin with. You wouldn't be able to put a modern CPU on an A4/letter sized sheet.

MayeulC 7y ago
Well, of course, it would be hard. But a 1cm² 22nm die could largely fit (186cm²) into a sheet of paper with a 300nm feature length. And most modern designs are more concerned with gate length, so 22nm->7nm doesn't exactly translate into the expected area gains for the whole chip. One of the downsides of bigger chips is that we're more sensitive to propagation delays and capacitances. On the flip side, capacitors are easier to make. That would likely lead to new architectures: fully asynchronous, maximizing throughput over single thread performance. That'd be quite interesting for neuromorphic architectures, and would likely displace FPGAs in a lot of situations if printers (or circuits) were affordable. Now, imagine 3D integration: that would be… a book! More seriously, having bigger chips to work with means that the contacts can be bigger, thus easier to align. We could also start blurring lines between PCB and IC design, bringing discrete components inside ICs. I admit I don't know yet what a practical size would be, but the last talk I saw on the topic used organic semiconductors, and the channel length was on the order of millimeters. Despite this, it already had quite a lot of potential.
- zxcmx 7y ago
  One thing I've wondered about for a while is optically inspectable self-printed electronics. If you go down the rabbit hole of wondering "how can I ever trust this computer" far enough this starts looking like a moderately interesting idea. For this application you might want to just print a kind of simple TPM you could use to bootstrap trust or act as a secure enclave for another system. This isn't a thing anyone has meaningfully been able to do for open-source systems before, to my knowledge.
  - amelius 7y ago
    Interesting idea, but once you have multiple layers of interconnect, I think the inspection would become difficult.
    - Accujack 7y ago
      Not to mention waste heat.
    - MayeulC 7y ago
      Surely determining which trace is connected to which would be hard at intersections, but: - You can hypothetically print it yourself, scanning each layer separately - I wonder if some design patterns couldn't be used to prove the circuit wouldn't work if a crossing point was shorted or cut - you could have additionnal, easier-to-check verification circuits - if ordering big circuits, it might be possible to order them whole, as well as layer-by-layer. One could verify each layer, measure it, compute the inertia matrix of the whole and verify it matches. If the feature size is big, though, I'd be wary of discrete components that could have been planted there.
RodgerTheGreat 7y ago
If I could print a TMS-1000 or a 6502 on something the size of a postage stamp, using equipment I could reasonably keep in a home workshop, it would be enormously useful. Think embedded, not replacing your desktop.
- minxomat 7y ago
  I think if anyone will replicate this, a 6502 will be one of the first projects. After all, the feature size is the main thing that prevents the discrete component replicas from being drop-in replacements: https://monster6502.com/ https://monster6502.com/