10 ms·

I wonder if they are considering RISC-V. Probably not - they don’t sound like risk-taking people. But given the timelines of chip production, I would think a co

I wonder if they are considering RISC-V. Probably not - they don’t sound like risk-taking people. But given the timelines of chip production, I would think a couple years from now a solid RISC-V server might be very much in demand.

als0 7y ago
The vector extensions would need to be finished before that can happen. As a side note, a couple of jobs on their careers page seem to want ARM assembly experience...so it's likely to be an ARM core?
- tyingq 7y ago
  Yeah, they mostly avoid being specific, but there's a few ARM callouts on their job listings, like: "Knowledge of library cells and optimizations from ARM, TSMC, and other high performance library vendors" https://nuviainc.com/job-listing/nuvia-4csrj https://nuviainc.com/job-listing/nuvia-4csrj "Familiarity with coherent bus protocols like ARM AMBA and CHI bus protocols" https://nuviainc.com/job-listing/nuvia-mlpfd https://nuviainc.com/job-listing/nuvia-mlpfd
  - csboyer 7y ago
    Even without ARM, I can see them using AMBA or AXI for the bus because there is so much existing IP out there built to that interface.
    - monocasa 7y ago
      And they're fairly emblematic of modern SoC bus protocols. You'll be fine jumping to TileLink or whatever if you're used to AMBA/AXI.
Tuna-Fish 7y ago
The RISC-V ISA is pretty awful for high-end designs. No competitive servers can be built with it. Plenty of people seem to have been caught up in the hype of RISC-V taking over the world and doing everything, but that's never going to happen. The ISA is heavily optimized towards making very low-end devices very cheap. Like, don't think cellphone chips, think appliances. This is not a bad call, as it's the area where greenfield designs with cost advantage have the best chance to get market share. However, there is no path of extending the ISA that will make it competitive with ARM or x86 on high-end devices. The only way to do that is to design RISC-VI, that abandons most of the things that RISC-V what it is.
- zozbot234 7y ago
  > The RISC-V ISA is pretty awful for high-end designs. No competitive servers can be built with it. I have to dispute this. RISC-V was specifically intended to make high-end designs (i.e. out-of-order architectures, multicore, SMT etc.) not just feasible but relatively easy. It's also designed for extensibility from the ground up, which few others architectures are.
- pjc50 7y ago
  This argument would benefit from specific examples.
- tempguy9999 7y ago
  You've not justified this. I'd be very interested in understanding why you make this claim.
- russler23 7y ago
  That’s funny, SiFive just announced a 3-way OoO RISC-V core. A73 performance, but half the die area. Pretty awful, I guess. https://www.sifive.com/blog/incredibly-scalable-high-performance-risc-v-core-ip https://www.sifive.com/blog/incredibly-scalable-high-perform...
  - rrss 7y ago
    FYI the comparison is to the A72, not A73. A72 is a mobile chip, so still not particularly relevant to tuna-fish's claim about high end servers. The raspberry pi 4 is not a high end server. > half the die area Much of this is free when comparing a 16nm design to a 7nm design. See footnote 1 in your link. EDIT: I was curious, so I looked up the transistor density of tsmc 16nm vs 7nm. 16nm: 28.8 MTr/mm^2 7nm: 96.5 MTr/mm^2 So I think that sifive core with "half the area" is actually not quite as good as a die shrink of the A72.
    - m0zg 7y ago
      >> A72 is a mobile chip So is Apple A13. And yet it's been reported to outperform all Intel desktop CPUs in single core performance (I find the benchmark dubious, but I do believe it's close, and faster than it has any right to be given the super low power consumption). The only reason it doesn't do so in multicore perf is the limited TDP - a concern which does not exist in high end chips. https://news.ycombinator.com/item?id=21033371 https://news.ycombinator.com/item?id=21033371
Symmetry 7y ago
The big names involved are all heavily involved in ARM so I expect that's what they'll use.
- dmix 7y ago
  Specifically their focus is on energy efficiency in data center chips.
ip26 7y ago
You're saying these are risc-averse people?
- deleted 7y ago
  [deleted]
panpanna 7y ago
Or maybe risc-v is just good enough?

als0 7y ago

The vector extensions would need to be finished before that can happen. As a side note, a couple of jobs on their careers page seem to want ARM assembly experience...so it's likely to be an ARM core?

tyingq 7y ago
Yeah, they mostly avoid being specific, but there's a few ARM callouts on their job listings, like: "Knowledge of library cells and optimizations from ARM, TSMC, and other high performance library vendors" https://nuviainc.com/job-listing/nuvia-4csrj https://nuviainc.com/job-listing/nuvia-4csrj "Familiarity with coherent bus protocols like ARM AMBA and CHI bus protocols" https://nuviainc.com/job-listing/nuvia-mlpfd https://nuviainc.com/job-listing/nuvia-mlpfd
- csboyer 7y ago
  Even without ARM, I can see them using AMBA or AXI for the bus because there is so much existing IP out there built to that interface.
  - monocasa 7y ago
    And they're fairly emblematic of modern SoC bus protocols. You'll be fine jumping to TileLink or whatever if you're used to AMBA/AXI.

Tuna-Fish 7y ago

The RISC-V ISA is pretty awful for high-end designs. No competitive servers can be built with it. Plenty of people seem to have been caught up in the hype of RISC-V taking over the world and doing everything, but that's never going to happen. The ISA is heavily optimized towards making very low-end devices very cheap. Like, don't think cellphone chips, think appliances. This is not a bad call, as it's the area where greenfield designs with cost advantage have the best chance to get market share. However, there is no path of extending the ISA that will make it competitive with ARM or x86 on high-end devices. The only way to do that is to design RISC-VI, that abandons most of the things that RISC-V what it is.

zozbot234 7y ago
> The RISC-V ISA is pretty awful for high-end designs. No competitive servers can be built with it. I have to dispute this. RISC-V was specifically intended to make high-end designs (i.e. out-of-order architectures, multicore, SMT etc.) not just feasible but relatively easy. It's also designed for extensibility from the ground up, which few others architectures are.
pjc50 7y ago
This argument would benefit from specific examples.
tempguy9999 7y ago
You've not justified this. I'd be very interested in understanding why you make this claim.
russler23 7y ago
That’s funny, SiFive just announced a 3-way OoO RISC-V core. A73 performance, but half the die area. Pretty awful, I guess. https://www.sifive.com/blog/incredibly-scalable-high-performance-risc-v-core-ip https://www.sifive.com/blog/incredibly-scalable-high-perform...
- rrss 7y ago
  FYI the comparison is to the A72, not A73. A72 is a mobile chip, so still not particularly relevant to tuna-fish's claim about high end servers. The raspberry pi 4 is not a high end server. > half the die area Much of this is free when comparing a 16nm design to a 7nm design. See footnote 1 in your link. EDIT: I was curious, so I looked up the transistor density of tsmc 16nm vs 7nm. 16nm: 28.8 MTr/mm^2 7nm: 96.5 MTr/mm^2 So I think that sifive core with "half the area" is actually not quite as good as a die shrink of the A72.
  - m0zg 7y ago
    >> A72 is a mobile chip So is Apple A13. And yet it's been reported to outperform all Intel desktop CPUs in single core performance (I find the benchmark dubious, but I do believe it's close, and faster than it has any right to be given the super low power consumption). The only reason it doesn't do so in multicore perf is the limited TDP - a concern which does not exist in high end chips. https://news.ycombinator.com/item?id=21033371 https://news.ycombinator.com/item?id=21033371

Symmetry 7y ago

The big names involved are all heavily involved in ARM so I expect that's what they'll use.

dmix 7y ago
Specifically their focus is on energy efficiency in data center chips.

ip26 7y ago

You're saying these are risc-averse people?

deleted 7y ago
[deleted]

panpanna 7y ago

Or maybe risc-v is just good enough?