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Intel is becoming a meme with those 30-50 page erratas in their documents. When they can't improve IPC or nm tech why don't they at least focus on fixing bugs?
by lousken 7y ago
Intel is becoming a meme with those 30-50 page erratas in their documents. When they can't improve IPC or nm tech why don't they at least focus on fixing bugs?
- raxxorrax 7y agoWell, if they fix this bug the hardware will become slower in any case. Honestly I don't understand the issue and wonder why it didn't manifest constantly. > unpredictable behavior could happen when jump instructions cross cache lines Under which kind of circumstances? What does it mean anyway? The jump-instruction itself with arguments crossing cache lines? Wouldn't that happen quite often?