5 ms·
related: are there any good sources on how you design for out of order processing? I have done a lot of "intro to electronic circuits" stuff that lead to a real
by rtpg 7y ago
related: are there any good sources on how you design for out of order processing? I have done a lot of "intro to electronic circuits" stuff that lead to a really basic register-based CPU, but when we get into stuff like OOO or branch prediction stuff I feel like I haven't really seen much on how it can work while keeping your sanity from a design perspective.
- fofoz 7y agoHennessy,Patterson "Computer Architecture: A Quantitative Approach" 6th edition
- tempguy9999 7y agohttps://duckduckgo.com/html?q=tomasulo%27s%20algorithm https://duckduckgo.com/html?q=tomasulo%27s%20algorithm - start reading some various hits. youtube has some useful animations. H&P book (referenced by sibling comment) is good.
- rwmj 7y agoPerhaps the source for the RISC-V BOOM processor? https://content.riscv.org/wp-content/uploads/2017/12/Wed0936-BOOM-v2-An-Open-Source-Out-of-Order-RISC-V-Core-Celio.pdf https://content.riscv.org/wp-content/uploads/2017/12/Wed0936...
- ekiwi 7y agoIf you want to find the source code and some information on how to build and run it, you should check out their new website: https://boom-core.org/ https://boom-core.org/
- gen3 7y agoI used this book in college https://www.amazon.com/Computer-Organization-Design-ARM-Architecture/dp/0128017333?SubscriptionId=AKIAILSHYYTFIVPWUY6Q&tag=duckduckgo-fpas-20&linkCode=xm2&camp=2025&creative=165953&creativeASIN=0128017333 https://www.amazon.com/Computer-Organization-Design-ARM-Arch...
- thesz 7y agohttps://en.wikipedia.org/wiki/Scoreboarding https://en.wikipedia.org/wiki/Scoreboarding - the easiest method (and one of earliest ones). You keep a list (bitmap) of registers (hazards, really - MMU exceptions are hazards too) to be computed, you issue instructions whenever their hazards are cleared (will be cleared just before they read operands). It is quite on par with the renaming machinery used in contemporary CPUs and is much, much easier to implement.