4 ms·
This is actually pretty interesting. The statistic most people noticed is frequency, which climbed exponentially between 1995-2003 and came to a dead stop a yea
by Veedrac 7y ago
This is actually pretty interesting. The statistic most people noticed is frequency, which climbed exponentially between 1995-2003 and came to a dead stop a year later.
https://i.imgur.com/QAEqcie.png https://i.imgur.com/QAEqcie.png
However, almost immediately afterwards, IPC, which had been stagnant over that whole time period, started itself steadily climbing exponentially, with the rate falling only fairly slowly.
https://i.imgur.com/KiUqMhl.png https://i.imgur.com/KiUqMhl.png
The overall result is exponential growth in ST performance that far outlived frequency growth, and which has only truly tapered recently... though it's likely AMD's recent reentry to the market starts to recover trends somewhat.
https://i.imgur.com/h2jN9RK.png https://i.imgur.com/h2jN9RK.png
But now that IPC is starting to struggle (though not falter), core counts are finally taking off. We haven't hit the end yet.
- speedplane 7y ago> But now that IPC is starting to struggle (though not falter), core counts are finally taking off. We haven't hit the end yet. The fact that the industry is now relying on these tricks are actually good evidence that performance is hitting a wall. In the past, if you wanted to 2X boost in performance, you could just wait a year. Now waiting doesn't work. You need to build your own ASIC or move things to the cloud where you can rely on big-tech's economies of scale. We have hit an end, and the performance boosts we see today are one trick ponies. After you build your ASIC, you can't get much faster. After you move to the cloud and reduce processing power costs, you can't reduce further. These tricks have slowed the "perceived" deterioration of Moore's law, but they are acts of desperation, not real progress.
- mamon 7y ago>> You need to build your own ASIC Might be the reason why Intel is putting FPGAs in the latest Xeons: https://www.anandtech.com/show/12773/intel-shows-xeon-scalable-gold-6138p-with-integrated-fpga-shipping-to-vendors https://www.anandtech.com/show/12773/intel-shows-xeon-scalab...
- speedplane 7y ago>> You need to build your own ASIC > Might be the reason why Intel is putting FPGAs in the latest Xeons: https://www.anandtech.com/show/12773/intel-shows-xeon-scalab.. https://www.anandtech.com/show/12773/intel-shows-xeon-scalab.... This is an excellent example. As things are trending, I would expect FPGA and other hardware programming to become more common. I would not be surprised if in a few years websites and browsers start doing their own FPGA optimizations. Adding FPGA programmibility does not increase real raw performance, it just allows developers to do optimizations they would not otherwise be able to do. Along this line of thinking, you would expect developers to start moving away from slower scripting languages towards faster compiled languages. This has not happened yet at any large scale, largely because the huge demand of digital services has placed a premium on developer productivity over application speed. However, this trend is happening on the edges (e.g., using C-based Numpy within Python, the steady rise of Go). If computer performance remains as flat as it has been, I predict we'll start seeing more popular libraries rewritten in faster compiled languages (and eventually FPGAs/ASICs) within the next 5 years.
- pertymcpert 7y agoWhat are you on about? OP was talking about IPC improvements, not cloud BS.
- Der_Einzige 7y agoYou don't deserve the downvotes that you are getting. They dislike you because you're right
- BubRoss 7y agoPerformance has not hit a wall at all. More transistors was never going to speed up serial processes forever. Transistor count is still increasing, core count is still increasing and software speed usually has room for a 10x-100x speedup in most places since it is usually done so poorly. Most of the time high end games are the only areas where CPUs are actually used to their potential because of memory latency.
- cm2187 7y agoInteresting. But core count will probably be barely perceptible by the user. Most real world applications are hard to parallelise, either because the underlying problem is hard, or because the engineering skillset is limited, or because it makes development harder with bugs that are difficult to reproduce and analyse. Either way I don’t think we will be in a world of all algorithms parallelised anytime soon, only some specific widely used applications (video compressing, etc). And even though some languages that are “natively parallel” like erlang, rust, f# etc are attracting interest, the mass of developers is converging on languages that are designed not to be parallelised (python, javascript). So it’s not even a matter of a younger generation of developers is about to come to show us oldies how it’s done.
- imtringued 7y agoI don't see the problem. Almost all consumer workloads are trivial in comparison to video encoding.
- tssva 7y agoBut computers don't run a single algorithm at a time. They run a large number of algorithms at the same time. In this scenario increasing core count can increase the number of algorithms truly executing simultaneously which brings tangible benefits the user will notice.