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IIRC we don't even have masks that can really take EUV, the mask is destroyed after each exposure.
by Itsdijital 7y ago
IIRC we don't even have masks that can really take EUV, the mask is destroyed after each exposure.
- torpfactory 7y agoI think the masks can take it but their is a ton of difficulty in inspecting the masks themselves for defects. IIRC the leading candidate at the time I was in the industry was to actually expose wafers and then scan the wafers for defects which originated on the mask, hoping to not confuse these with other process defects. Not sure how they ended up solving that one.
- deepnotderp 7y agoNot just that but high throughput pellicles (prevents dust from ko-ing you) haven't hit production yet iirc
- jacquesm 7y agoDo multiple exposures and see which defects come up more than once?
- torpfactory 7y agoYeah - typically print the entire wafer then compare dies within a field (usually there are multiple dies exposed in a single exposure) to see which defects are in the same place on each field. This won’t work if there is only one die per field, as could be the case for an exceptionally large server chip. In that case you probably need to predict what the image will look like based on design files and then compare with the actual image and look for differences. You could also e-beam scan the whole wafer but this can take a while (like 30 days when I was around), night damage the wafer, and bumps up against the reliability of E-beam components. It wasn’t being seriously considered.
- imtringued 7y agoThat would ruin the economics of EUV. A mask set costs millions of dollars and for chip designers it is the generally the highest most expensive part of the manufacturing process and must be amortized over as many units as possible. The machines that create the masks are also not very fast. A mask is created by firing an electron beam which is a sequential process. If you were limited to one wafer per mask then not only would each chip cost tens of thousands of dollars you would also only be able to produce a single digit amount of wafers per year.