10 ms·

Pardon my ignorance, but besides being an open-source ISA what's the reason for the popularity for RISC-V? The buzz alone has piqued my interest, but I'm just t

Pardon my ignorance, but besides being an open-source ISA what's the reason for the popularity for RISC-V? The buzz alone has piqued my interest, but I'm just trying to understand the "why".

tyingq 7y ago
No ARM-like revenue based royalties, and broadly supported, including mainline Linux kernel support. So, companies like Western Digital are all in. And, if someone makes an "open source" CPU with it, to match the open source ISA, it's a win for trusted computing. Also popular here because some folks imagine a new ecosystem of cheap Rpi type boards with no magical binary blobs. See, for example, lowrisc.org (though they seem far from shipping)
- makomk 7y ago
  There's already a lot of Allwinner-based Pi clones with no magical binary blobs, though - depending on the board the only blob may be the non-modifiable boot ROM, which is actually quite convenient for low-level hackers since it just loads your own bootloader from one of several devices and gets out of its way. This includes support for raw NAND flash so in theory you can avoid even having a binary blob in your storage device if you get one of the few boards with raw NAND onboard.
- panpanna 7y ago
  Arm license cost is nothing compared to what they have invested in testing and QA. One round of asic that fails is significantly more expensive. If you are jumping on risc-v to save money you have your priorities very wrong. On the other hand if you are Huawei and can't do business with arm...
  - tyingq 7y ago
    1.5% of your per unit revenue for a hard drive seems significant. WD seems to agree, and they don't seem like a risk prone company.
    - panpanna 7y ago
      1.5% does sound significant, but does WD save 100% of those 1.5% by doing it in-house? Furthermore, those 1.5% covered more than just the CPU (peripherals, buss technologies, patents, manufacturing know-how). I'm not saying WD is wrong, but I think they are overestimating how much they can save. This is probably just to get a better deal from arm.
      - phkahler 7y ago
        From their public statements, this is not to get a better deal from ARM. they are all-in with risc-v and have already made public their first core (among other things), which is better than an equivalent from ARM. At this point I dont think ARM could bring much to the table for WD. They've invested way beyond what makes sense for getting better pricing.
      - hajile 7y ago
        1.5% of a big number is still a big number. Western Digital's revenue in 2018 was 18 billion. Even if only 0.15% of their revenue went to ARM, that would be 27M or enough to hire 100 chip designers at 270K each. That would be enough people for a very advanced chip, but WD doesn't need to build the next supercomputer. Instead, they want a chip customized to handle their specific workload with high throughput and probably some specialized instructions to put some algorithms in hardware. Moreover, their RISCV chip design expense should reduce over time both because they don't need to change chip micro-architectures very often and because as more companies switch to shared, open hardware, the costs are reduced Another example is Nvidia. They continue to hold an ARM license for several ARM designs and another license for their own custom Denver/Carmel designs. Despite this, they still opted to use RISCV in their GPUs. These companies manufacture chip designs for a living. They certainly understand the costs involved and have determined the immediate and long-term costs are lower vs the provided benefits.
    - pjc50 7y ago
      It's not for the whole unit, just the chip? Isn't it Qualcomm with the whole-device royalties?
  - jimktrains2 7y ago
    > One round of asic that fails is significantly more expensive. Does that change with ARM? If you're licensing the ISA, or even bits of HDL, you're still fabbing your own stuff, right? If it was the choice between pre-made RISCV and pre-made ARM, then the licensing could play into a cost difference between models, but otherwise they'd both be pre-fabbed, ready-to-use-products?
    - panpanna 7y ago
      But then why bother if you are just using someone elses pre-made macros with a fixed architecture (cpu + memories + peripherals + power & clock distribution)? At this stage, would it even be cheaper? I think there is some merit to risc-v but people pushing hard for it's use RIGHT NOW don't seem to understand the challenges of SoC design and manufacturing.
  - abainbridge 7y ago
    This argument used to come up when I worked at Cambridge Silicon Radio, where we made ASICs. We made our own CPU designs for those ASICs. Some of the engineers thought making our own CPU designs was a stupid idea and some thought that switching to ARM designs was a stupid idea. The only fact I have is that our CPU designs were not the main cause of bugs in our chips. If you asked the digital designers, they'd say things like, "Why are software engineers so interested in CPU designs. The kinds of embedded CPUs we need are easy to design. Implementing a correct power management state machine is hard. Implementing an efficient WiFi PHY is hard. Get off my lawn..." Some problems with putting ARM CPUs in our chips were: a) integration engineering costs (ie find a way to multiplex some existing pins on the package with the jtag debug port), b) having to do price and contract negotiation with ARM (that part of the company was less efficient than the digital engineering team), c) finding that the change you wanted to make to the chip was incompatible with the ARM contract you'd just spent 6 months negotiating.
    - panpanna 7y ago
      I believe CSR went out of business after burning an investment of $1bn with nothing to show for. Not trying to be hostile, just pointing out how costly "let's design our own soc, how hard can it be?" is.
      - lnsru 7y ago
        Are we talking about same CSR? It’s still in business. It’s now part of Qualcomm: https://en.m.wikipedia.org/wiki/CSR_(company) https://en.m.wikipedia.org/wiki/CSR_(company)
        panpanna 7y ago
        Hmmm.. I stand corrected. I know a few people who joined ARM after CSR closed down but that could be just some offices shutting down. (not an arm employee, btw)
        abainbridge 7y ago
- slezyr 7y ago
  > Also popular here because some folks imagine a new ecosystem of cheap Rpi type boards with no magical binary blobs. See, for example, lowrisc.org (though they seem far from shipping) I thought that the biggest blob in most linux systems is GPU driver and RISC-V doesn't solves this.
  - tyingq 7y ago
    There's a mystery boot blob in the RPi that's pretty famous.
    - wolfgke 7y ago
      This is because of the specific architecture of BCM2836, BCM2837, and BCM2711B0, which are rather VideoCore chips with appended ARM cores.
    - imtringued 7y ago
      I'm not sure what you are talking about. There is no such thing as a mystery boot blob in the Raspberry Pi. It is well known that the video core chip is the main processor of the Raspberry Pi. It runs a proprietary RTOS called ThreadX. As an afterthought someone added a bunch of ARM cores to the Video Core chip which obviously has to cooperate with the main processor to do anything at all. https://www.heise.de/select/ct/2016/8/1460193213013079/contentimages/Raspi_Broadcom_mtk_IG.jpg https://www.heise.de/select/ct/2016/8/1460193213013079/conte...
      - tyingq 7y ago
        So you're saying there's source available for the boot binary?
  - wolfgke 7y ago
    > I thought that the biggest blob in most linux systems is GPU driver and RISC-V doesn't solves this. It makes no sense to counter a hypetrain with intelligent arguments. :-) Of course, you are right.
  - 7y ago
panpanna 7y ago
It's the new thing. I don't think it is significantly better than existing ones (including the now fully open source mips). And it is already significantly fragmented. But it's the new thing and where the mindshare currently is. Many new ideas are tested on risc-v, and there exist multiple open source implementations.
mrob 7y ago
Combination of simplicity (at least before you start adding extensions), and good software support. It's easy to understand like the old 8-bit ISAs, but you can still use modern compilers.
- non-entity 7y ago
  > It's easy to understand like the old 8-bit ISAs Oh that's kinda cool. Playing with 8-bit processors is what first got me interested in low level computing and helped a lot of things "click" for me
als0 7y ago
What particularly bugs me are the false claims that say using RISC-V will make you more secure.
- eeZah7Ux 7y ago
  The weapon manufacturers investing in the RISC-V foundation might disagree.
  - als0 7y ago
    RISC-V changes the economics of processor development. It doesn't improve security for end users.
- tasty_freeze 7y ago
  I assume what people are referring to when they say that is the embedded security processors in Intel and AMD chips.
- dreamcompiler 7y ago
  The lack of speculative execution or a Management Engine strongly suggests these claims are true.
  - floatboth 7y ago
    These things have NOTHING to do with the ISA.
    - skunkpocalypse 7y ago
      Then why can't I buy an amd64-ISA chip without one? It has quite a lot to do with the ISA's licensor.
    - dreamcompiler 7y ago
      Correct but all current implementations don't have them, and Patterson has recommended against SE as being be more trouble than it's worth.
chongli 7y ago
It's been quite a while (several years) since I read the original paper [1] on RISC-V's design but I remember it being very elegant, with a lot of things fixed that other ISAs have been stuck with for decades. It's truly modern in the sense that it demonstrates how much we've learned in the last few decades, without being such a radical departure that it requires rearchitecting all software for it. [1] https://people.eecs.berkeley.edu/~krste/papers/EECS-2016-1.pdf https://people.eecs.berkeley.edu/~krste/papers/EECS-2016-1.p...
kbumsik 7y ago
Note that most of RISC-V chips arise in China. As seen in the fight between Trump and Huawei (ARM almost ended contract with Huawei) I think RISC-V becoming a great possible alternative to ARM for Chinese companies.
childintime 7y ago
For me it is clear RISC-V will become the defacto standard in processors, soon it'll even compete on the high end. So besides being cheaper: - as a developer my RISC-V (assembly and system) skills will remain relevant and valuable - by using RISC-V MCU's now I will avoid future family migrations - RISC-V's are already the MCU's of choice embedded in FPGA's and AI chips, and I won't need to learn another tool before being able to utilize them - RISC-V enables collective community-enabled innovation (which was the prime driver for creating it) - Rust runs on RISC-V MCUs (besides ARM) - RISC-V simplicity simply means less bugs
- kabdib 7y ago
  > RISC-V simplicity simply means less bugs Fewer bugs in your code, or fewer bugs to encounter in the platform? I've found that my bugs are usually processor-independent, and that most of the bugs in SOCs are not with the CPU cores, but the support components around them (e.g., DMA engines and timer registers with bizarre behavior). Well . . . and cache coherency issues. But everyone has cache coherency bugs. :-)
  - garmaine 7y ago
    > Well . . . and cache coherency issues. But everyone has cache coherency bugs. :-) RISC-V is trying to make that a thing of the past.
    - kinghajj 7y ago
      "Can't have cache coherency bugs, if your ISA doesn't require cache coherency!"
      - garmaine 7y ago
        Maybe I need to elaborate. The RISC-V foundation is currently working to strictly define both strong and weak cache coherency modes, and a separate formal verification group is working to define and validate a formal model of cache coherency behavior for the RISC-V ISA. There have been numerous updates on this project at the past couple of RISC-V workshops. When this is all done, ensuring a given implementation is bug-free with respect to cache coherency will be a mechanical process (at least, that is the goal).
pjc50 7y ago
As someone who works in a famous mixed-signal IC company, I note that almost everything I've heard about it comes from HN and not internal discussion. Instruction sets are just not where the leading edge of value creation is. And the design and manufacture costs of ICs remain pretty irreducible. People expecting lots of open source hardware to suddenly start popping up are going to be disappointed. An instruction set is an API. It's the architecture behind it that matters.
- GoblinSlayer 7y ago
  Targeting all use cases with x86 is not unusual?
  - pjc50 7y ago
    I'm not sure what the argument is here?
- kevin_thibedeau 7y ago
  It's going to start popping up as soon as Chinese chip manufactures get ramped onto the bandwagon. They will want the extra margin that royalty free cores give them. The rest of the world will be satisfied with cheap ARM devices.
- petra 7y ago
  A lot of innovation starts at universities. They seem to like risc-v. And with the ecosystem available, there's less of a need to port to ARM.
- nickik 7y ago
  The problem is that you can't have open-source chips without an open-source ISA. Without an open-source ISA we can't have a open-hardware movement for silicon. Yes, the internal design is the important part, and having an ISA that is designed properly, will make that a lot easier and we have seen both high and low performance chips that can compete with ARM speeds while having far less development time. RISC-V is designed to allow individual companies to add their own secret sauce and to have a tool-chain that makes that easy. We should remember that RISC-V is still incredible young, it only just escaped officially from university 3 years ago.
GoblinSlayer 7y ago
Previous ISAs were made for computers that don't exist anymore.
tylerl 7y ago
Cost. ARM and MIPS require licensing fees, and spinning your own new architecture will make your chips irrelevant. RISC-V doesn't charge you to use their instruction set, and it's already supported by developer tooling.
- 693471 7y ago
  MIPS is open now https://www.mipsopen.com/ https://www.mipsopen.com/
ncmncm 7y ago
The openness means it is accessible by academics, who are lately working hard on proving formal correctness of the spec, which we don't have for commercial designs. It is unfortunate that they froze the base instruction set before people who understand performance optimization got a good look at it. But, ultimately, if the instruction density is no worse than Intel's, it won't be handicapped by that until something else comes along. When that happens, it will make the transition to the next easier.

Pardon my ignorance, but besides being an open-source ISA what's the reason for the popularity for RISC-V? The buzz alone has piqued my interest, but I'm just trying to understand the "why".

tyingq 7y ago

No ARM-like revenue based royalties, and broadly supported, including mainline Linux kernel support. So, companies like Western Digital are all in. And, if someone makes an "open source" CPU with it, to match the open source ISA, it's a win for trusted computing. Also popular here because some folks imagine a new ecosystem of cheap Rpi type boards with no magical binary blobs. See, for example, lowrisc.org (though they seem far from shipping)

makomk 7y ago
There's already a lot of Allwinner-based Pi clones with no magical binary blobs, though - depending on the board the only blob may be the non-modifiable boot ROM, which is actually quite convenient for low-level hackers since it just loads your own bootloader from one of several devices and gets out of its way. This includes support for raw NAND flash so in theory you can avoid even having a binary blob in your storage device if you get one of the few boards with raw NAND onboard.
panpanna 7y ago
Arm license cost is nothing compared to what they have invested in testing and QA. One round of asic that fails is significantly more expensive. If you are jumping on risc-v to save money you have your priorities very wrong. On the other hand if you are Huawei and can't do business with arm...
- tyingq 7y ago
  1.5% of your per unit revenue for a hard drive seems significant. WD seems to agree, and they don't seem like a risk prone company.
  - panpanna 7y ago
    1.5% does sound significant, but does WD save 100% of those 1.5% by doing it in-house? Furthermore, those 1.5% covered more than just the CPU (peripherals, buss technologies, patents, manufacturing know-how). I'm not saying WD is wrong, but I think they are overestimating how much they can save. This is probably just to get a better deal from arm.
    - phkahler 7y ago
      From their public statements, this is not to get a better deal from ARM. they are all-in with risc-v and have already made public their first core (among other things), which is better than an equivalent from ARM. At this point I dont think ARM could bring much to the table for WD. They've invested way beyond what makes sense for getting better pricing.
    - hajile 7y ago
      1.5% of a big number is still a big number. Western Digital's revenue in 2018 was 18 billion. Even if only 0.15% of their revenue went to ARM, that would be 27M or enough to hire 100 chip designers at 270K each. That would be enough people for a very advanced chip, but WD doesn't need to build the next supercomputer. Instead, they want a chip customized to handle their specific workload with high throughput and probably some specialized instructions to put some algorithms in hardware. Moreover, their RISCV chip design expense should reduce over time both because they don't need to change chip micro-architectures very often and because as more companies switch to shared, open hardware, the costs are reduced Another example is Nvidia. They continue to hold an ARM license for several ARM designs and another license for their own custom Denver/Carmel designs. Despite this, they still opted to use RISCV in their GPUs. These companies manufacture chip designs for a living. They certainly understand the costs involved and have determined the immediate and long-term costs are lower vs the provided benefits.
  - pjc50 7y ago
    It's not for the whole unit, just the chip? Isn't it Qualcomm with the whole-device royalties?
- jimktrains2 7y ago
  > One round of asic that fails is significantly more expensive. Does that change with ARM? If you're licensing the ISA, or even bits of HDL, you're still fabbing your own stuff, right? If it was the choice between pre-made RISCV and pre-made ARM, then the licensing could play into a cost difference between models, but otherwise they'd both be pre-fabbed, ready-to-use-products?
  - panpanna 7y ago
    But then why bother if you are just using someone elses pre-made macros with a fixed architecture (cpu + memories + peripherals + power & clock distribution)? At this stage, would it even be cheaper? I think there is some merit to risc-v but people pushing hard for it's use RIGHT NOW don't seem to understand the challenges of SoC design and manufacturing.
- abainbridge 7y ago
  This argument used to come up when I worked at Cambridge Silicon Radio, where we made ASICs. We made our own CPU designs for those ASICs. Some of the engineers thought making our own CPU designs was a stupid idea and some thought that switching to ARM designs was a stupid idea. The only fact I have is that our CPU designs were not the main cause of bugs in our chips. If you asked the digital designers, they'd say things like, "Why are software engineers so interested in CPU designs. The kinds of embedded CPUs we need are easy to design. Implementing a correct power management state machine is hard. Implementing an efficient WiFi PHY is hard. Get off my lawn..." Some problems with putting ARM CPUs in our chips were: a) integration engineering costs (ie find a way to multiplex some existing pins on the package with the jtag debug port), b) having to do price and contract negotiation with ARM (that part of the company was less efficient than the digital engineering team), c) finding that the change you wanted to make to the chip was incompatible with the ARM contract you'd just spent 6 months negotiating.
  - panpanna 7y ago
    I believe CSR went out of business after burning an investment of $1bn with nothing to show for. Not trying to be hostile, just pointing out how costly "let's design our own soc, how hard can it be?" is.
    - lnsru 7y ago
      Are we talking about same CSR? It’s still in business. It’s now part of Qualcomm: https://en.m.wikipedia.org/wiki/CSR_(company) https://en.m.wikipedia.org/wiki/CSR_(company)
      - panpanna 7y ago
        Hmmm.. I stand corrected. I know a few people who joined ARM after CSR closed down but that could be just some offices shutting down. (not an arm employee, btw)
        abainbridge 7y ago
slezyr 7y ago
> Also popular here because some folks imagine a new ecosystem of cheap Rpi type boards with no magical binary blobs. See, for example, lowrisc.org (though they seem far from shipping) I thought that the biggest blob in most linux systems is GPU driver and RISC-V doesn't solves this.
- tyingq 7y ago
  There's a mystery boot blob in the RPi that's pretty famous.
  - wolfgke 7y ago
    This is because of the specific architecture of BCM2836, BCM2837, and BCM2711B0, which are rather VideoCore chips with appended ARM cores.
  - imtringued 7y ago
    I'm not sure what you are talking about. There is no such thing as a mystery boot blob in the Raspberry Pi. It is well known that the video core chip is the main processor of the Raspberry Pi. It runs a proprietary RTOS called ThreadX. As an afterthought someone added a bunch of ARM cores to the Video Core chip which obviously has to cooperate with the main processor to do anything at all. https://www.heise.de/select/ct/2016/8/1460193213013079/contentimages/Raspi_Broadcom_mtk_IG.jpg https://www.heise.de/select/ct/2016/8/1460193213013079/conte...
    - tyingq 7y ago
      So you're saying there's source available for the boot binary?
- wolfgke 7y ago
  > I thought that the biggest blob in most linux systems is GPU driver and RISC-V doesn't solves this. It makes no sense to counter a hypetrain with intelligent arguments. :-) Of course, you are right.
- 7y ago

panpanna 7y ago

It's the new thing. I don't think it is significantly better than existing ones (including the now fully open source mips). And it is already significantly fragmented. But it's the new thing and where the mindshare currently is. Many new ideas are tested on risc-v, and there exist multiple open source implementations.

mrob 7y ago

Combination of simplicity (at least before you start adding extensions), and good software support. It's easy to understand like the old 8-bit ISAs, but you can still use modern compilers.

non-entity 7y ago
> It's easy to understand like the old 8-bit ISAs Oh that's kinda cool. Playing with 8-bit processors is what first got me interested in low level computing and helped a lot of things "click" for me

als0 7y ago

What particularly bugs me are the false claims that say using RISC-V will make you more secure.

eeZah7Ux 7y ago
The weapon manufacturers investing in the RISC-V foundation might disagree.
- als0 7y ago
  RISC-V changes the economics of processor development. It doesn't improve security for end users.
tasty_freeze 7y ago
I assume what people are referring to when they say that is the embedded security processors in Intel and AMD chips.
dreamcompiler 7y ago
The lack of speculative execution or a Management Engine strongly suggests these claims are true.
- floatboth 7y ago
  These things have NOTHING to do with the ISA.
  - skunkpocalypse 7y ago
    Then why can't I buy an amd64-ISA chip without one? It has quite a lot to do with the ISA's licensor.
  - dreamcompiler 7y ago
    Correct but all current implementations don't have them, and Patterson has recommended against SE as being be more trouble than it's worth.

chongli 7y ago

It's been quite a while (several years) since I read the original paper [1] on RISC-V's design but I remember it being very elegant, with a lot of things fixed that other ISAs have been stuck with for decades. It's truly modern in the sense that it demonstrates how much we've learned in the last few decades, without being such a radical departure that it requires rearchitecting all software for it. [1] https://people.eecs.berkeley.edu/~krste/papers/EECS-2016-1.pdf https://people.eecs.berkeley.edu/~krste/papers/EECS-2016-1.p...

kbumsik 7y ago

Note that most of RISC-V chips arise in China. As seen in the fight between Trump and Huawei (ARM almost ended contract with Huawei) I think RISC-V becoming a great possible alternative to ARM for Chinese companies.

childintime 7y ago

For me it is clear RISC-V will become the defacto standard in processors, soon it'll even compete on the high end. So besides being cheaper: - as a developer my RISC-V (assembly and system) skills will remain relevant and valuable - by using RISC-V MCU's now I will avoid future family migrations - RISC-V's are already the MCU's of choice embedded in FPGA's and AI chips, and I won't need to learn another tool before being able to utilize them - RISC-V enables collective community-enabled innovation (which was the prime driver for creating it) - Rust runs on RISC-V MCUs (besides ARM) - RISC-V simplicity simply means less bugs

kabdib 7y ago
> RISC-V simplicity simply means less bugs Fewer bugs in your code, or fewer bugs to encounter in the platform? I've found that my bugs are usually processor-independent, and that most of the bugs in SOCs are not with the CPU cores, but the support components around them (e.g., DMA engines and timer registers with bizarre behavior). Well . . . and cache coherency issues. But everyone has cache coherency bugs. :-)
- garmaine 7y ago
  > Well . . . and cache coherency issues. But everyone has cache coherency bugs. :-) RISC-V is trying to make that a thing of the past.
  - kinghajj 7y ago
    "Can't have cache coherency bugs, if your ISA doesn't require cache coherency!"
    - garmaine 7y ago
      Maybe I need to elaborate. The RISC-V foundation is currently working to strictly define both strong and weak cache coherency modes, and a separate formal verification group is working to define and validate a formal model of cache coherency behavior for the RISC-V ISA. There have been numerous updates on this project at the past couple of RISC-V workshops. When this is all done, ensuring a given implementation is bug-free with respect to cache coherency will be a mechanical process (at least, that is the goal).

pjc50 7y ago

As someone who works in a famous mixed-signal IC company, I note that almost everything I've heard about it comes from HN and not internal discussion. Instruction sets are just not where the leading edge of value creation is. And the design and manufacture costs of ICs remain pretty irreducible. People expecting lots of open source hardware to suddenly start popping up are going to be disappointed. An instruction set is an API. It's the architecture behind it that matters.

GoblinSlayer 7y ago
Targeting all use cases with x86 is not unusual?
- pjc50 7y ago
  I'm not sure what the argument is here?
kevin_thibedeau 7y ago
It's going to start popping up as soon as Chinese chip manufactures get ramped onto the bandwagon. They will want the extra margin that royalty free cores give them. The rest of the world will be satisfied with cheap ARM devices.
petra 7y ago
A lot of innovation starts at universities. They seem to like risc-v. And with the ecosystem available, there's less of a need to port to ARM.
nickik 7y ago
The problem is that you can't have open-source chips without an open-source ISA. Without an open-source ISA we can't have a open-hardware movement for silicon. Yes, the internal design is the important part, and having an ISA that is designed properly, will make that a lot easier and we have seen both high and low performance chips that can compete with ARM speeds while having far less development time. RISC-V is designed to allow individual companies to add their own secret sauce and to have a tool-chain that makes that easy. We should remember that RISC-V is still incredible young, it only just escaped officially from university 3 years ago.

GoblinSlayer 7y ago

Previous ISAs were made for computers that don't exist anymore.

tylerl 7y ago

Cost. ARM and MIPS require licensing fees, and spinning your own new architecture will make your chips irrelevant. RISC-V doesn't charge you to use their instruction set, and it's already supported by developer tooling.

693471 7y ago
MIPS is open now https://www.mipsopen.com/ https://www.mipsopen.com/

ncmncm 7y ago

The openness means it is accessible by academics, who are lately working hard on proving formal correctness of the spec, which we don't have for commercial designs. It is unfortunate that they froze the base instruction set before people who understand performance optimization got a good look at it. But, ultimately, if the instruction density is no worse than Intel's, it won't be handicapped by that until something else comes along. When that happens, it will make the transition to the next easier.